From da7672c80844644c410fcd65f0bdb1a4a48d83ec Mon Sep 17 00:00:00 2001 From: Daniel Kolesa Date: Thu, 17 Dec 2020 03:43:16 +0100 Subject: [PATCH] ppcle support based on https://reviews.llvm.org/D92445 --- include/llvm/ADT/Triple.h | 12 +++++++ include/llvm/Frontend/OpenMP/OMPKinds.def | 1 + include/llvm/Object/ELFObjectFile.h | 4 +-- lib/CodeGen/TargetLoweringBase.cpp | 2 +- lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 1 + .../RuntimeDyld/RuntimeDyldELF.cpp | 3 +- lib/Frontend/OpenMP/OMPContext.cpp | 1 + lib/Object/RelocationResolver.cpp | 1 + lib/Support/Triple.cpp | 17 ++++++++-- lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 5 +-- .../PowerPC/Disassembler/PPCDisassembler.cpp | 2 ++ .../PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 5 +-- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 4 +-- lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 ++ lib/Target/PowerPC/PPCSubtarget.cpp | 3 +- lib/Target/PowerPC/PPCTargetMachine.cpp | 9 +++--- .../PowerPC/TargetInfo/PowerPCTargetInfo.cpp | 9 +++++- .../PowerPC/TargetInfo/PowerPCTargetInfo.h | 1 + lib/Target/TargetMachine.cpp | 2 +- .../ELF/binary-output-target.test | 23 +++++++++---- .../llvm-objcopy/ELF/cross-arch-headers.test | 32 +++++++++---------- .../llvm-objdump/ELF/PowerPC/branch-offset.s | 15 +++++---- 22 files changed, 106 insertions(+), 48 deletions(-) diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h index 6bad18f1..013bbe1d 100644 --- a/include/llvm/ADT/Triple.h +++ b/include/llvm/ADT/Triple.h @@ -63,6 +63,7 @@ public: mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el msp430, // MSP430: msp430 ppc, // PPC: powerpc + ppcle, // PPCLE: powerpc (little endian) ppc64, // PPC64: powerpc64, ppu ppc64le, // PPC64LE: powerpc64le r600, // R600: AMD GPUs HD2XXX - HD6XXX @@ -721,6 +722,17 @@ public: return isMIPS32() || isMIPS64(); } + /// Tests whether the target is PowerPC (32- or 64-bit LE or BE). + bool isPPC() const { + return getArch() == Triple::ppc || getArch() == Triple::ppc64 || + getArch() == Triple::ppcle || getArch() == Triple::ppc64le; + } + + /// Tests whether the target is 32-bit PowerPC (little and big endian). + bool isPPC32() const { + return getArch() == Triple::ppc || getArch() == Triple::ppcle; + } + /// Tests whether the target is 64-bit PowerPC (little and big endian). bool isPPC64() const { return getArch() == Triple::ppc64 || getArch() == Triple::ppc64le; diff --git a/include/llvm/Frontend/OpenMP/OMPKinds.def b/include/llvm/Frontend/OpenMP/OMPKinds.def index 93ea63c1..42af0443 100644 --- a/include/llvm/Frontend/OpenMP/OMPKinds.def +++ b/include/llvm/Frontend/OpenMP/OMPKinds.def @@ -1078,6 +1078,7 @@ __OMP_TRAIT_PROPERTY(device, arch, aarch64) __OMP_TRAIT_PROPERTY(device, arch, aarch64_be) __OMP_TRAIT_PROPERTY(device, arch, aarch64_32) __OMP_TRAIT_PROPERTY(device, arch, ppc) +__OMP_TRAIT_PROPERTY(device, arch, ppcle) __OMP_TRAIT_PROPERTY(device, arch, ppc64) __OMP_TRAIT_PROPERTY(device, arch, ppc64le) __OMP_TRAIT_PROPERTY(device, arch, x86) diff --git a/include/llvm/Object/ELFObjectFile.h b/include/llvm/Object/ELFObjectFile.h index 62ecd8b5..eecec520 100644 --- a/include/llvm/Object/ELFObjectFile.h +++ b/include/llvm/Object/ELFObjectFile.h @@ -1106,7 +1106,7 @@ StringRef ELFObjectFile::getFileFormatName() const { case ELF::EM_MSP430: return "elf32-msp430"; case ELF::EM_PPC: - return "elf32-powerpc"; + return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc"); case ELF::EM_RISCV: return "elf32-littleriscv"; case ELF::EM_SPARC: @@ -1180,7 +1180,7 @@ template Triple::ArchType ELFObjectFile::getArch() const { case ELF::EM_MSP430: return Triple::msp430; case ELF::EM_PPC: - return Triple::ppc; + return IsLittleEndian ? Triple::ppcle : Triple::ppc; case ELF::EM_PPC64: return IsLittleEndian ? Triple::ppc64le : Triple::ppc64; case ELF::EM_RISCV: diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp index 42c1fa8a..527a4cd5 100644 --- a/lib/CodeGen/TargetLoweringBase.cpp +++ b/lib/CodeGen/TargetLoweringBase.cpp @@ -135,7 +135,7 @@ void TargetLoweringBase::InitLibcalls(const Triple &TT) { setLibcallCallingConv((RTLIB::Libcall)LC, CallingConv::C); // For IEEE quad-precision libcall names, PPC uses "kf" instead of "tf". - if (TT.getArch() == Triple::ppc || TT.isPPC64()) { + if (TT.isPPC()) { setLibcallName(RTLIB::ADD_F128, "__addkf3"); setLibcallName(RTLIB::SUB_F128, "__subkf3"); setLibcallName(RTLIB::MUL_F128, "__mulkf3"); diff --git a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp index 27bebe50..963b3f77 100644 --- a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +++ b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp @@ -122,6 +122,7 @@ void TargetLoweringObjectFileELF::Initialize(MCContext &Ctx, // Fallthrough if not using EHABI LLVM_FALLTHROUGH; case Triple::ppc: + case Triple::ppcle: case Triple::x86: PersonalityEncoding = isPositionIndependent() ? dwarf::DW_EH_PE_indirect | diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp index 7ed8a718..7ebfa6ac 100644 --- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp +++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp @@ -961,7 +961,8 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section, resolveARMRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL), Type, (uint32_t)(Addend & 0xffffffffL)); break; - case Triple::ppc: + case Triple::ppc: // Fall through. + case Triple::ppcle: resolvePPC32Relocation(Section, Offset, Value, Type, Addend); break; case Triple::ppc64: // Fall through. diff --git a/lib/Frontend/OpenMP/OMPContext.cpp b/lib/Frontend/OpenMP/OMPContext.cpp index c44e858a..f148008d 100644 --- a/lib/Frontend/OpenMP/OMPContext.cpp +++ b/lib/Frontend/OpenMP/OMPContext.cpp @@ -40,6 +40,7 @@ OMPContext::OMPContext(bool IsDeviceCompilation, Triple TargetTriple) { case Triple::mips64: case Triple::mips64el: case Triple::ppc: + case Triple::ppcle: case Triple::ppc64: case Triple::ppc64le: case Triple::x86: diff --git a/lib/Object/RelocationResolver.cpp b/lib/Object/RelocationResolver.cpp index ad7a50d1..4a195a8d 100644 --- a/lib/Object/RelocationResolver.cpp +++ b/lib/Object/RelocationResolver.cpp @@ -645,6 +645,7 @@ getRelocationResolver(const ObjectFile &Obj) { switch (Obj.getArch()) { case Triple::x86: return {supportsX86, resolveX86}; + case Triple::ppcle: case Triple::ppc: return {supportsPPC32, resolvePPC32}; case Triple::arm: diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp index fec1985c..c075ee45 100644 --- a/lib/Support/Triple.cpp +++ b/lib/Support/Triple.cpp @@ -53,6 +53,7 @@ StringRef Triple::getArchTypeName(ArchType Kind) { case ppc64: return "powerpc64"; case ppc64le: return "powerpc64le"; case ppc: return "powerpc"; + case ppcle: return "powerpcle"; case r600: return "r600"; case renderscript32: return "renderscript32"; case renderscript64: return "renderscript64"; @@ -100,7 +101,8 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { case ppc64: case ppc64le: - case ppc: return "ppc"; + case ppc: + case ppcle: return "ppc"; case mips: case mipsel: @@ -286,6 +288,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { .Case("ppc64", ppc64) .Case("ppc32", ppc) .Case("ppc", ppc) + .Case("ppc32le", ppcle) + .Case("ppcle", ppcle) .Case("ppc64le", ppc64le) .Case("r600", r600) .Case("amdgcn", amdgcn) @@ -396,6 +400,7 @@ static Triple::ArchType parseArch(StringRef ArchName) { .Cases("i786", "i886", "i986", Triple::x86) .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) + .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) .Cases("powerpc64le", "ppc64le", Triple::ppc64le) .Case("xscale", Triple::arm) @@ -695,6 +700,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { case Triple::nvptx64: case Triple::nvptx: case Triple::ppc64le: + case Triple::ppcle: case Triple::r600: case Triple::renderscript32: case Triple::renderscript64: @@ -1258,6 +1264,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { case llvm::Triple::mipsel: case llvm::Triple::nvptx: case llvm::Triple::ppc: + case llvm::Triple::ppcle: case llvm::Triple::r600: case llvm::Triple::renderscript32: case llvm::Triple::riscv32: @@ -1321,7 +1328,6 @@ Triple Triple::get32BitArchVariant() const { case Triple::bpfeb: case Triple::bpfel: case Triple::msp430: - case Triple::ppc64le: case Triple::systemz: case Triple::ve: T.setArch(UnknownArch); @@ -1341,6 +1347,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::mipsel: case Triple::nvptx: case Triple::ppc: + case Triple::ppcle: case Triple::r600: case Triple::renderscript32: case Triple::riscv32: @@ -1367,6 +1374,7 @@ Triple Triple::get32BitArchVariant() const { case Triple::mips64el: T.setArch(Triple::mipsel); break; case Triple::nvptx64: T.setArch(Triple::nvptx); break; case Triple::ppc64: T.setArch(Triple::ppc); break; + case Triple::ppc64le: T.setArch(Triple::ppcle); break; case Triple::renderscript64: T.setArch(Triple::renderscript32); break; case Triple::riscv64: T.setArch(Triple::riscv32); break; case Triple::sparcv9: T.setArch(Triple::sparc); break; @@ -1430,6 +1438,7 @@ Triple Triple::get64BitArchVariant() const { case Triple::mipsel: T.setArch(Triple::mips64el); break; case Triple::nvptx: T.setArch(Triple::nvptx64); break; case Triple::ppc: T.setArch(Triple::ppc64); break; + case Triple::ppcle: T.setArch(Triple::ppc64le); break; case Triple::renderscript32: T.setArch(Triple::renderscript64); break; case Triple::riscv32: T.setArch(Triple::riscv64); break; case Triple::sparc: T.setArch(Triple::sparcv9); break; @@ -1488,6 +1497,7 @@ Triple Triple::getBigEndianArchVariant() const { case Triple::bpfel: T.setArch(Triple::bpfeb); break; case Triple::mips64el:T.setArch(Triple::mips64); break; case Triple::mipsel: T.setArch(Triple::mips); break; + case Triple::ppcle: T.setArch(Triple::ppc); break; case Triple::ppc64le: T.setArch(Triple::ppc64); break; case Triple::sparcel: T.setArch(Triple::sparc); break; case Triple::tcele: T.setArch(Triple::tce); break; @@ -1505,7 +1515,6 @@ Triple Triple::getLittleEndianArchVariant() const { switch (getArch()) { case Triple::UnknownArch: case Triple::lanai: - case Triple::ppc: case Triple::sparcv9: case Triple::systemz: @@ -1520,6 +1529,7 @@ Triple Triple::getLittleEndianArchVariant() const { case Triple::bpfeb: T.setArch(Triple::bpfel); break; case Triple::mips64: T.setArch(Triple::mips64el); break; case Triple::mips: T.setArch(Triple::mipsel); break; + case Triple::ppc: T.setArch(Triple::ppcle); break; case Triple::ppc64: T.setArch(Triple::ppc64le); break; case Triple::sparc: T.setArch(Triple::sparcel); break; case Triple::tce: T.setArch(Triple::tcele); break; @@ -1550,6 +1560,7 @@ bool Triple::isLittleEndian() const { case Triple::msp430: case Triple::nvptx64: case Triple::nvptx: + case Triple::ppcle: case Triple::ppc64le: case Triple::r600: case Triple::renderscript32: diff --git a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 13fd7d05..dbd8e933 100644 --- a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1809,8 +1809,9 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) { /// Force static initialization. extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() { RegisterMCAsmParser A(getThePPC32Target()); - RegisterMCAsmParser B(getThePPC64Target()); - RegisterMCAsmParser C(getThePPC64LETarget()); + RegisterMCAsmParser B(getThePPC32LETarget()); + RegisterMCAsmParser C(getThePPC64Target()); + RegisterMCAsmParser D(getThePPC64LETarget()); } #define GET_REGISTER_MATCHER diff --git a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index 74c6fd37..4ddaa96d 100644 --- a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -54,6 +54,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() { // Register the disassembler for each target. TargetRegistry::RegisterMCDisassembler(getThePPC32Target(), createPPCDisassembler); + TargetRegistry::RegisterMCDisassembler(getThePPC32LETarget(), + createPPCLEDisassembler); TargetRegistry::RegisterMCDisassembler(getThePPC64Target(), createPPCDisassembler); TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(), diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp index 593dc284..2b76af27 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp @@ -26,7 +26,8 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { if (is64Bit) { CodePointerSize = CalleeSaveStackSlotSize = 8; } - IsLittleEndian = T.getArch() == Triple::ppc64le; + IsLittleEndian = + T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle; // ".comm align is in bytes but .align is pow-2." AlignmentIsInBytes = false; @@ -56,7 +57,7 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { void PPCXCOFFMCAsmInfo::anchor() {} PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) { - if (T.getArch() == Triple::ppc64le) + if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle) report_fatal_error("XCOFF is not supported for little-endian targets"); CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4; diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp index 3092d56d..748df7d2 100644 --- a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -334,8 +334,8 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T, } extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() { - for (Target *T : - {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) { + for (Target *T : {&getThePPC32Target(), &getThePPC32LETarget(), + &getThePPC64Target(), &getThePPC64LETarget()}) { // Register the MC asm info. RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo); diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp index bf5fe741..0d8a419a 100644 --- a/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -1829,6 +1829,8 @@ createPPCAsmPrinterPass(TargetMachine &tm, extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() { TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), createPPCAsmPrinterPass); + TargetRegistry::RegisterAsmPrinter(getThePPC32LETarget(), + createPPCAsmPrinterPass); TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), createPPCAsmPrinterPass); TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index 3836cc96..eff8fa46 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -174,7 +174,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { // Determine endianness. // FIXME: Part of the TargetMachine. - IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le); + IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le || + TargetTriple.getArch() == Triple::ppcle); } bool PPCSubtarget::enableMachineScheduler() const { return true; } diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index f15f9c7f..a68535be 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -98,8 +98,9 @@ static cl::opt extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() { // Register the targets RegisterTargetMachine A(getThePPC32Target()); - RegisterTargetMachine B(getThePPC64Target()); - RegisterTargetMachine C(getThePPC64LETarget()); + RegisterTargetMachine B(getThePPC32LETarget()); + RegisterTargetMachine C(getThePPC64Target()); + RegisterTargetMachine D(getThePPC64LETarget()); PassRegistry &PR = *PassRegistry::getPassRegistry(); #ifndef NDEBUG @@ -128,8 +129,8 @@ static std::string getDataLayoutString(const Triple &T) { bool is64Bit = T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le; std::string Ret; - // Most PPC* platforms are big endian, PPC64LE is little endian. - if (T.getArch() == Triple::ppc64le) + // Most PPC* platforms are big endian, PPC(64)LE is little endian. + if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle) Ret = "e"; else Ret = "E"; diff --git a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp index 649bd648..6bb952f2 100644 --- a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp +++ b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp @@ -14,6 +14,10 @@ Target &llvm::getThePPC32Target() { static Target ThePPC32Target; return ThePPC32Target; } +Target &llvm::getThePPC32LETarget() { + static Target ThePPC32LETarget; + return ThePPC32LETarget; +} Target &llvm::getThePPC64Target() { static Target ThePPC64Target; return ThePPC64Target; @@ -24,9 +28,12 @@ Target &llvm::getThePPC64LETarget() { } extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetInfo() { - RegisterTarget X(getThePPC32Target(), "ppc32", + RegisterTarget W(getThePPC32Target(), "ppc32", "PowerPC 32", "PPC"); + RegisterTarget X( + getThePPC32LETarget(), "ppc32le", "PowerPC 32 LE", "PPC"); + RegisterTarget Y(getThePPC64Target(), "ppc64", "PowerPC 64", "PPC"); diff --git a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h index 2d0afbfb..f9d20ef0 100644 --- a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h +++ b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h @@ -14,6 +14,7 @@ namespace llvm { class Target; Target &getThePPC32Target(); +Target &getThePPC32LETarget(); Target &getThePPC64Target(); Target &getThePPC64LETarget(); diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 074e9fde..6cf986d3 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -187,7 +187,7 @@ bool TargetMachine::shouldAssumeDSOLocal(const Module &M, Triple::ArchType Arch = TT.getArch(); // PowerPC prefers avoiding copy relocations. - if (Arch == Triple::ppc || TT.isPPC64()) + if (TT.isPPC()) return false; // Check if we can use copy relocations. diff --git a/test/tools/llvm-objcopy/ELF/binary-output-target.test b/test/tools/llvm-objcopy/ELF/binary-output-target.test index f7073f07..78fc1435 100644 --- a/test/tools/llvm-objcopy/ELF/binary-output-target.test +++ b/test/tools/llvm-objcopy/ELF/binary-output-target.test @@ -15,8 +15,17 @@ # RUN: llvm-objcopy -I binary -O elf32-bigmips %t.txt %t.mips.o # RUN: llvm-readobj --file-headers %t.mips.o | FileCheck %s --check-prefixes=CHECK,BE,MIPS,32 +# RUN: llvm-objcopy -I binary -O elf32-powerpc %t.txt %t.ppc32be.o +# RUN: llvm-readobj --file-headers %t.ppc32be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPC32BE,32 + +# RUN: llvm-objcopy -I binary -O elf32-powerpcle %t.txt %t.ppc32le.o +# RUN: llvm-readobj --file-headers %t.ppc32le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPC32LE,32 + +# RUN: llvm-objcopy -I binary -O elf64-powerpc %t.txt %t.ppc64be.o +# RUN: llvm-readobj --file-headers %t.ppc64be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPC64BE,64 + # RUN: llvm-objcopy -I binary -O elf64-powerpcle %t.txt %t.ppc64le.o -# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,64 +# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPC64LE,64 # RUN: llvm-objcopy -I binary -O elf32-littleriscv %t.txt %t.rv32.o # RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32 @@ -43,8 +52,8 @@ # MIPS-SAME: mips{{$}} # RISCV32-SAME: riscv{{$}} # RISCV64-SAME: riscv{{$}} -# PPC-SAME: powerpc{{$}} -# PPC64le-SAME: powerpc{{$}} +# PPCBE-SAME: powerpc{{$}} +# PPCLE-SAME: powerpcle{{$}} # SPARC-SAME: sparc # SPARCEL-SAME: sparc # X86-64-SAME: x86-64 @@ -54,8 +63,10 @@ # HEXAGON-NEXT: Arch: hexagon # I386-NEXT: Arch: i386 # MIPS-NEXT: Arch: mips{{$}} -# PPC-NEXT: Arch: powerpc{{$}} -# PPC64-NEXT: Arch: powerpc64le +# PPC32BE-NEXT: Arch: powerpc{{$}} +# PPC32LE-NEXT: Arch: powerpcle{{$}} +# PPC64BE-NEXT: Arch: powerpc64{{$}} +# PPC64LE-NEXT: Arch: powerpc64le{{$}} # RISCV32-NEXT: Arch: riscv32 # RISCV64-NEXT: Arch: riscv64 # SPARC-NEXT: Arch: sparc{{$}} @@ -87,7 +98,7 @@ # HEXAGON-NEXT: Machine: EM_HEXAGON (0xA4) # I386-NEXT: Machine: EM_386 (0x3) # MIPS-NEXT: Machine: EM_MIPS (0x8) -# PPC-NEXT: Machine: EM_PPC (0x14) +# PPC32-NEXT: Machine: EM_PPC (0x14) # PPC64-NEXT: Machine: EM_PPC64 (0x15) # RISCV32-NEXT: Machine: EM_RISCV (0xF3) # RISCV64-NEXT: Machine: EM_RISCV (0xF3) diff --git a/test/tools/llvm-objcopy/ELF/cross-arch-headers.test b/test/tools/llvm-objcopy/ELF/cross-arch-headers.test index db82c36c..98f1b3c6 100644 --- a/test/tools/llvm-objcopy/ELF/cross-arch-headers.test +++ b/test/tools/llvm-objcopy/ELF/cross-arch-headers.test @@ -34,25 +34,25 @@ # RUN: llvm-readobj --file-headers %t.elf64_littleaarch64.dwo | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV # RUN: llvm-objcopy %t.o -O elf32-powerpc %t.elf32_powerpc.o --split-dwo=%t.elf32_powerpc.dwo -# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV -# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV +# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV +# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV # RUN: llvm-objcopy %t.o -O elf64-powerpc %t.elf64_powerpc.o --split-dwo=%t.elf64_powerpc.dwo -# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV -# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV +# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV +# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV # RUN: llvm-objcopy %t.o -O elf32-powerpcle %t.elf32_ppcle.o --split-dwo=%t.elf32_ppcle.dwo -# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV -# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV +# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV +# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV + +# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo +# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV +# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV # RUN: llvm-objcopy %t.o -O elf32-x86-64 %t.elf32_x86_64.o --split-dwo=%t.elf32_x86_64.dwo # RUN: llvm-readobj --file-headers %t.elf32_x86_64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV # RUN: llvm-readobj --file-headers %t.elf32_x86_64.dwo | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV -# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo -# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV -# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV - # RUN: llvm-objcopy %t.o -O elf32-littleriscv %t.elf32_littleriscv.o --split-dwo=%t.elf32_littleriscv.dwo # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV @@ -145,9 +145,8 @@ Symbols: # ARM-SAME: littlearm # HEXAGON-SAME: hexagon # MIPS-SAME: mips -# PPC-SAME: powerpc{{$}} -# PPC64BE-SAME: powerpc{{$}} -# PPC64LE-SAME: powerpcle{{$}} +# PPCBE-SAME: powerpc{{$}} +# PPCLE-SAME: powerpcle{{$}} # RISCV32-SAME: riscv{{$}} # RISCV64-SAME: riscv{{$}} # SPARC-SAME: sparc @@ -163,9 +162,10 @@ Symbols: # MIPSLE-NEXT: Arch: mipsel{{$}} # MIPS64BE-NEXT: Arch: mips64{{$}} # MIPS64LE-NEXT: Arch: mips64el{{$}} -# PPC-NEXT: Arch: powerpc{{$}} +# PPC32BE-NEXT: Arch: powerpc{{$}} +# PPC32LE-NEXT: Arch: powerpcle{{$}} # PPC64BE-NEXT: Arch: powerpc64{{$}} -# PPC64LE-NEXT: Arch: powerpc64le +# PPC64LE-NEXT: Arch: powerpc64le{{$}} # RISCV32-NEXT: Arch: riscv32 # RISCV64-NEXT: Arch: riscv64 # SPARC-NEXT: Arch: sparc{{$}} @@ -191,7 +191,7 @@ Symbols: # I386: Machine: EM_386 (0x3) # IAMCU: Machine: EM_IAMCU (0x6) # MIPS: Machine: EM_MIPS (0x8) -# PPC: Machine: EM_PPC (0x14) +# PPC32: Machine: EM_PPC (0x14) # PPC64: Machine: EM_PPC64 (0x15) # RISCV32: Machine: EM_RISCV (0xF3) # RISCV64: Machine: EM_RISCV (0xF3) diff --git a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s index bc0b6825..717e6f38 100644 --- a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s +++ b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s @@ -1,11 +1,14 @@ -# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32.o -# RUN: llvm-objdump -d --no-show-raw-insn %t.32.o | FileCheck --check-prefixes=ELF32,CHECK %s +# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32be.o +# RUN: llvm-objdump -d --no-show-raw-insn %t.32be.o | FileCheck --check-prefixes=ELF32,CHECK %s -# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64.o -# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s +# RUN: llvm-mc -triple=powerpcle -filetype=obj %s -o %t.32le.o +# RUN: llvm-objdump -d --no-show-raw-insn %t.32le.o | FileCheck --check-prefixes=ELF32,CHECK %s -# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64.o -# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s +# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64be.o +# RUN: llvm-objdump -d --no-show-raw-insn %t.64be.o | FileCheck --check-prefixes=ELF64,CHECK %s + +# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64le.o +# RUN: llvm-objdump -d --no-show-raw-insn %t.64le.o | FileCheck --check-prefixes=ELF64,CHECK %s # CHECK-LABEL: : # ELF32-NEXT: bl 0xfffffffc -- 2.29.2