diff --git a/srcpkgs/llvm11/files/patches/clang/clang-001-ppcle.patch b/srcpkgs/llvm11/files/patches/clang/clang-001-ppcle.patch new file mode 100644 index 00000000000..c99fdc77fcf --- /dev/null +++ b/srcpkgs/llvm11/files/patches/clang/clang-001-ppcle.patch @@ -0,0 +1,546 @@ +From 84ec75000ec5bd35f8be3245c8fd6b78aabbd63c Mon Sep 17 00:00:00 2001 +From: Daniel Kolesa +Date: Thu, 17 Dec 2020 03:43:25 +0100 +Subject: [PATCH] ppcle suppport + +based on https://reviews.llvm.org/D92445 +--- + lib/Basic/Targets.cpp | 10 +++++++++ + lib/Basic/Targets/OSTargets.h | 2 ++ + lib/Basic/Targets/PPC.cpp | 3 ++- + lib/Basic/Targets/PPC.h | 2 ++ + lib/CodeGen/CGBuiltin.cpp | 1 + + lib/CodeGen/CodeGenModule.cpp | 4 +--- + lib/CodeGen/TargetInfo.cpp | 9 +++++++- + lib/Driver/Driver.cpp | 4 +--- + lib/Driver/ToolChain.cpp | 2 ++ + lib/Driver/ToolChains/Clang.cpp | 9 ++++++-- + lib/Driver/ToolChains/CommonArgs.cpp | 1 + + lib/Driver/ToolChains/FreeBSD.cpp | 8 ++++++- + lib/Driver/ToolChains/Gnu.cpp | 25 +++++++++++++++++++++ + lib/Driver/ToolChains/Linux.cpp | 13 +++++++++-- + lib/Frontend/CompilerInvocation.cpp | 1 + + lib/Sema/SemaChecking.cpp | 1 + + test/CodeGen/altivec.c | 15 ++++++++----- + test/CodeGen/builtins-ppc-altivec.c | 2 ++ + test/CodeGen/ppc32-and-aix-struct-return.c | 6 +++++ + test/CodeGen/target-data.c | 4 ++++ + test/Driver/ppc-endian.c | 26 +++++++++++++++------- + 21 files changed, 122 insertions(+), 26 deletions(-) + +diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp +index 965f2738..d8ff000a 100644 +--- a/lib/Basic/Targets.cpp ++++ b/lib/Basic/Targets.cpp +@@ -334,6 +334,16 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple, + return new PPC32TargetInfo(Triple, Opts); + } + ++ case llvm::Triple::ppcle: ++ switch (os) { ++ case llvm::Triple::Linux: ++ return new LinuxTargetInfo(Triple, Opts); ++ case llvm::Triple::FreeBSD: ++ return new FreeBSDTargetInfo(Triple, Opts); ++ default: ++ return new PPC32TargetInfo(Triple, Opts); ++ } ++ + case llvm::Triple::ppc64: + if (Triple.isOSDarwin()) + return new DarwinPPC64TargetInfo(Triple, Opts); +diff --git a/lib/Basic/Targets/OSTargets.h b/lib/Basic/Targets/OSTargets.h +index 2a9e4f91..39e3b537 100644 +--- a/lib/Basic/Targets/OSTargets.h ++++ b/lib/Basic/Targets/OSTargets.h +@@ -252,6 +252,7 @@ public: + case llvm::Triple::mips: + case llvm::Triple::mipsel: + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + this->MCountName = "_mcount"; +@@ -408,6 +409,7 @@ public: + case llvm::Triple::mips64: + case llvm::Triple::mips64el: + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + this->MCountName = "_mcount"; +diff --git a/lib/Basic/Targets/PPC.cpp b/lib/Basic/Targets/PPC.cpp +index f0de2bf0..42f30a2f 100644 +--- a/lib/Basic/Targets/PPC.cpp ++++ b/lib/Basic/Targets/PPC.cpp +@@ -90,7 +90,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, + } + + // Target properties. +- if (getTriple().getArch() == llvm::Triple::ppc64le) { ++ if (getTriple().getArch() == llvm::Triple::ppc64le || ++ getTriple().getArch() == llvm::Triple::ppcle) { + Builder.defineMacro("_LITTLE_ENDIAN"); + } else { + if (!getTriple().isOSNetBSD() && +diff --git a/lib/Basic/Targets/PPC.h b/lib/Basic/Targets/PPC.h +index bda6cb7d..d6d8c9a3 100644 +--- a/lib/Basic/Targets/PPC.h ++++ b/lib/Basic/Targets/PPC.h +@@ -355,6 +355,8 @@ public: + : PPCTargetInfo(Triple, Opts) { + if (Triple.isOSAIX()) + resetDataLayout("E-m:a-p:32:32-i64:64-n32"); ++ else if ((Triple.getArch() == llvm::Triple::ppcle)) ++ resetDataLayout("e-m:e-p:32:32-i64:64-n32"); + else + resetDataLayout("E-m:e-p:32:32-i64:64-n32"); + +diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp +index 8994b939..4a4b1744 100644 +--- a/lib/CodeGen/CGBuiltin.cpp ++++ b/lib/CodeGen/CGBuiltin.cpp +@@ -4523,6 +4523,7 @@ static Value *EmitTargetArchBuiltinExpr(CodeGenFunction *CGF, + case llvm::Triple::x86_64: + return CGF->EmitX86BuiltinExpr(BuiltinID, E); + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + return CGF->EmitPPCBuiltinExpr(BuiltinID, E); +diff --git a/lib/CodeGen/CodeGenModule.cpp b/lib/CodeGen/CodeGenModule.cpp +index 4ae8ce7e..cbf7da1a 100644 +--- a/lib/CodeGen/CodeGenModule.cpp ++++ b/lib/CodeGen/CodeGenModule.cpp +@@ -890,9 +890,7 @@ static bool shouldAssumeDSOLocal(const CodeGenModule &CGM, + return false; + + // PPC has no copy relocations and cannot use a plt entry as a symbol address. +- llvm::Triple::ArchType Arch = TT.getArch(); +- if (Arch == llvm::Triple::ppc || Arch == llvm::Triple::ppc64 || +- Arch == llvm::Triple::ppc64le) ++ if (TT.isPPC()) + return false; + + // If we can use copy relocations we can assume it is local. +diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp +index 9cd63ebe..0434eb6a 100644 +--- a/lib/CodeGen/TargetInfo.cpp ++++ b/lib/CodeGen/TargetInfo.cpp +@@ -4838,7 +4838,7 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList, + + bool PPC32TargetCodeGenInfo::isStructReturnInRegABI( + const llvm::Triple &Triple, const CodeGenOptions &Opts) { +- assert(Triple.getArch() == llvm::Triple::ppc); ++ assert(Triple.isPPC32()); + + switch (Opts.getStructReturnConvention()) { + case CodeGenOptions::SRCK_Default: +@@ -10874,6 +10874,13 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { + return SetCGInfo( + new PPC32TargetCodeGenInfo(Types, IsSoftFloat, RetSmallStructInRegABI)); + } ++ case llvm::Triple::ppcle: { ++ bool IsSoftFloat = CodeGenOpts.FloatABI == "soft"; ++ bool RetSmallStructInRegABI = ++ PPC32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts); ++ return SetCGInfo( ++ new PPC32TargetCodeGenInfo(Types, IsSoftFloat, RetSmallStructInRegABI)); ++ } + case llvm::Triple::ppc64: + if (Triple.isOSAIX()) + return SetCGInfo(new AIXTargetCodeGenInfo(Types, /*Is64Bit*/ true)); +diff --git a/lib/Driver/Driver.cpp b/lib/Driver/Driver.cpp +index ece8222d..9b96d03c 100644 +--- a/lib/Driver/Driver.cpp ++++ b/lib/Driver/Driver.cpp +@@ -4931,9 +4931,7 @@ const ToolChain &Driver::getToolChain(const ArgList &Args, + !Target.hasEnvironment()) + TC = std::make_unique(*this, Target, + Args); +- else if (Target.getArch() == llvm::Triple::ppc || +- Target.getArch() == llvm::Triple::ppc64 || +- Target.getArch() == llvm::Triple::ppc64le) ++ else if (Target.isPPC()) + TC = std::make_unique(*this, Target, + Args); + else if (Target.getArch() == llvm::Triple::ve) +diff --git a/lib/Driver/ToolChain.cpp b/lib/Driver/ToolChain.cpp +index b8c12fc9..9507693b 100644 +--- a/lib/Driver/ToolChain.cpp ++++ b/lib/Driver/ToolChain.cpp +@@ -238,6 +238,8 @@ StringRef ToolChain::getDefaultUniversalArchName() const { + return "arm64_32"; + case llvm::Triple::ppc: + return "ppc"; ++ case llvm::Triple::ppcle: ++ return "ppc"; + case llvm::Triple::ppc64: + return "ppc64"; + case llvm::Triple::ppc64le: +diff --git a/lib/Driver/ToolChains/Clang.cpp b/lib/Driver/ToolChains/Clang.cpp +index af4bcf95..3ee31620 100644 +--- a/lib/Driver/ToolChains/Clang.cpp ++++ b/lib/Driver/ToolChains/Clang.cpp +@@ -331,6 +331,7 @@ static void getTargetFeatures(const Driver &D, const llvm::Triple &Triple, + break; + + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + ppc::getPPCTargetFeatures(D, Triple, Args, Features); +@@ -527,6 +528,7 @@ static bool useFramePointerForTargetByDefault(const ArgList &Args, + // WebAssembly never wants frame pointers. + return false; + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + case llvm::Triple::riscv32: +@@ -1370,6 +1372,7 @@ static bool isSignedCharDefault(const llvm::Triple &Triple) { + return false; + + case llvm::Triple::hexagon: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64le: + case llvm::Triple::riscv32: + case llvm::Triple::riscv64: +@@ -1586,6 +1589,7 @@ void Clang::RenderTargetOptions(const llvm::Triple &EffectiveTriple, + break; + + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + AddPPCTargetArgs(Args, CmdArgs); +@@ -4508,7 +4512,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, + + if (Arg *A = Args.getLastArg(options::OPT_maix_struct_return, + options::OPT_msvr4_struct_return)) { +- if (TC.getArch() != llvm::Triple::ppc) { ++ if ((TC.getArch() != llvm::Triple::ppc) && ++ (TC.getArch() != llvm::Triple::ppcle)) { + D.Diag(diag::err_drv_unsupported_opt_for_target) + << A->getSpelling() << RawTriple.str(); + } else if (A->getOption().matches(options::OPT_maix_struct_return)) { +@@ -4621,7 +4626,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, + if (Arg *A = Args.getLastArg(options::OPT_LongDouble_Group)) { + if (TC.getTriple().isX86()) + A->render(Args, CmdArgs); +- else if ((TC.getArch() == llvm::Triple::ppc || TC.getTriple().isPPC64()) && ++ else if (TC.getTriple().isPPC() && + (A->getOption().getID() != options::OPT_mlong_double_80)) + A->render(Args, CmdArgs); + else +diff --git a/lib/Driver/ToolChains/CommonArgs.cpp b/lib/Driver/ToolChains/CommonArgs.cpp +index 6b6e276b..8b63dce7 100644 +--- a/lib/Driver/ToolChains/CommonArgs.cpp ++++ b/lib/Driver/ToolChains/CommonArgs.cpp +@@ -313,6 +313,7 @@ std::string tools::getCPUName(const ArgList &Args, const llvm::Triple &T, + return ""; + + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: { + std::string TargetCPUName = ppc::getPPCTargetCPU(Args); +diff --git a/lib/Driver/ToolChains/FreeBSD.cpp b/lib/Driver/ToolChains/FreeBSD.cpp +index 909ac5e9..6ec8e807 100644 +--- a/lib/Driver/ToolChains/FreeBSD.cpp ++++ b/lib/Driver/ToolChains/FreeBSD.cpp +@@ -42,6 +42,7 @@ void freebsd::Assembler::ConstructJob(Compilation &C, const JobAction &JA, + CmdArgs.push_back("--32"); + break; + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + CmdArgs.push_back("-a32"); + break; + case llvm::Triple::mips: +@@ -191,6 +192,11 @@ void freebsd::Linker::ConstructJob(Compilation &C, const JobAction &JA, + CmdArgs.push_back("-m"); + CmdArgs.push_back("elf32ppc_fbsd"); + break; ++ case llvm::Triple::ppcle: ++ CmdArgs.push_back("-m"); ++ // Use generic -- only usage is for freestanding. ++ CmdArgs.push_back("elf32lppc"); ++ break; + case llvm::Triple::mips: + CmdArgs.push_back("-m"); + CmdArgs.push_back("elf32btsmip_fbsd"); +@@ -372,7 +378,7 @@ FreeBSD::FreeBSD(const Driver &D, const llvm::Triple &Triple, + // When targeting 32-bit platforms, look for '/usr/lib32/crt1.o' and fall + // back to '/usr/lib' if it doesn't exist. + if ((Triple.getArch() == llvm::Triple::x86 || Triple.isMIPS32() || +- Triple.getArch() == llvm::Triple::ppc) && ++ Triple.isPPC32()) && + D.getVFS().exists(getDriver().SysRoot + "/usr/lib32/crt1.o")) + getFilePaths().push_back(getDriver().SysRoot + "/usr/lib32"); + else +diff --git a/lib/Driver/ToolChains/Gnu.cpp b/lib/Driver/ToolChains/Gnu.cpp +index c8a7fce0..38830c4f 100644 +--- a/lib/Driver/ToolChains/Gnu.cpp ++++ b/lib/Driver/ToolChains/Gnu.cpp +@@ -116,6 +116,7 @@ void tools::gcc::Common::ConstructJob(Compilation &C, const JobAction &JA, + break; + case llvm::Triple::x86: + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + CmdArgs.push_back("-m32"); + break; + case llvm::Triple::x86_64: +@@ -271,6 +272,8 @@ static const char *getLDMOption(const llvm::Triple &T, const ArgList &Args) { + return isArmBigEndian(T, Args) ? "armelfb_linux_eabi" : "armelf_linux_eabi"; + case llvm::Triple::ppc: + return "elf32ppclinux"; ++ case llvm::Triple::ppcle: ++ return "elf32lppclinux"; + case llvm::Triple::ppc64: + return "elf64ppc"; + case llvm::Triple::ppc64le: +@@ -736,6 +739,14 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C, + ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); + break; + } ++ case llvm::Triple::ppcle: { ++ CmdArgs.push_back("-a32"); ++ CmdArgs.push_back("-mppc"); ++ CmdArgs.push_back("-mlittle-endian"); ++ CmdArgs.push_back( ++ ppc::getPPCAsmModeForCPU(getCPUName(Args, getToolChain().getTriple()))); ++ break; ++ } + case llvm::Triple::ppc64: { + CmdArgs.push_back("-a64"); + CmdArgs.push_back("-mppc64"); +@@ -2125,6 +2136,11 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes( + // On 32-bit PowerPC systems running SUSE Linux, gcc is configured as a + // 64-bit compiler which defaults to "-m32", hence "powerpc64-suse-linux". + "powerpc64-suse-linux", "powerpc-montavista-linuxspe"}; ++ // PPCLE is only used in niche situations such as bootloaders ++ // and compatibility shims. ++ static const char *const PPCLELibDirs[] = {"/lib32", "/lib"}; ++ static const char *const PPCLETriples[] = {"powerpcle-linux-gnu", ++ "powerpcle-unknown-linux-gnu"}; + static const char *const PPC64LibDirs[] = {"/lib64", "/lib"}; + static const char *const PPC64Triples[] = { + "powerpc64-linux-gnu", "powerpc64-unknown-linux-gnu", +@@ -2365,6 +2381,12 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes( + BiarchLibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs)); + BiarchTripleAliases.append(begin(PPC64Triples), end(PPC64Triples)); + break; ++ case llvm::Triple::ppcle: ++ LibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs)); ++ TripleAliases.append(begin(PPCLETriples), end(PPCLETriples)); ++ BiarchLibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs)); ++ BiarchTripleAliases.append(begin(PPC64LETriples), end(PPC64LETriples)); ++ break; + case llvm::Triple::ppc64: + LibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs)); + TripleAliases.append(begin(PPC64Triples), end(PPC64Triples)); +@@ -2374,6 +2396,8 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes( + case llvm::Triple::ppc64le: + LibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs)); + TripleAliases.append(begin(PPC64LETriples), end(PPC64LETriples)); ++ BiarchLibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs)); ++ BiarchTripleAliases.append(begin(PPCLETriples), end(PPCLETriples)); + break; + case llvm::Triple::riscv32: + LibDirs.append(begin(RISCV32LibDirs), end(RISCV32LibDirs)); +@@ -2697,6 +2721,7 @@ bool Generic_GCC::IsIntegratedAssemblerDefault() const { + case llvm::Triple::thumb: + case llvm::Triple::thumbeb: + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + case llvm::Triple::riscv32: +diff --git a/lib/Driver/ToolChains/Linux.cpp b/lib/Driver/ToolChains/Linux.cpp +index 18035047..765a3ec2 100644 +--- a/lib/Driver/ToolChains/Linux.cpp ++++ b/lib/Driver/ToolChains/Linux.cpp +@@ -142,6 +142,10 @@ std::string Linux::getMultiarchTriple(const Driver &D, + if (D.getVFS().exists(SysRoot + "/lib/powerpc-linux-gnu")) + return "powerpc-linux-gnu"; + break; ++ case llvm::Triple::ppcle: ++ if (D.getVFS().exists(SysRoot + "/lib/powerpcle-linux-gnu")) ++ return "powerpcle-linux-gnu"; ++ break; + case llvm::Triple::ppc64: + if (D.getVFS().exists(SysRoot + "/lib/powerpc64-linux-gnu")) + return "powerpc64-linux-gnu"; +@@ -194,8 +198,7 @@ static StringRef getOSLibDir(const llvm::Triple &Triple, const ArgList &Args) { + // FIXME: This is a bit of a hack. We should really unify this code for + // reasoning about oslibdir spellings with the lib dir spellings in the + // GCCInstallationDetector, but that is a more significant refactoring. +- if (Triple.getArch() == llvm::Triple::x86 || +- Triple.getArch() == llvm::Triple::ppc) ++ if (Triple.getArch() == llvm::Triple::x86 || Triple.isPPC32()) + return "lib32"; + + if (Triple.getArch() == llvm::Triple::x86_64 && +@@ -492,6 +495,7 @@ std::string Linux::getDynamicLinker(const ArgList &Args) const { + break; + } + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + LibDir = "lib"; + Loader = "ld.so.1"; + break; +@@ -642,6 +646,8 @@ void Linux::AddClangSystemIncludeArgs(const ArgList &DriverArgs, + const StringRef PPCMultiarchIncludeDirs[] = { + "/usr/include/powerpc-linux-gnu", + "/usr/include/powerpc-linux-gnuspe"}; ++ const StringRef PPCLEMultiarchIncludeDirs[] = { ++ "/usr/include/powerpcle-linux-gnu"}; + const StringRef PPC64MultiarchIncludeDirs[] = { + "/usr/include/powerpc64-linux-gnu"}; + const StringRef PPC64LEMultiarchIncludeDirs[] = { +@@ -715,6 +721,9 @@ void Linux::AddClangSystemIncludeArgs(const ArgList &DriverArgs, + case llvm::Triple::ppc: + MultiarchIncludeDirs = PPCMultiarchIncludeDirs; + break; ++ case llvm::Triple::ppcle: ++ MultiarchIncludeDirs = PPCLEMultiarchIncludeDirs; ++ break; + case llvm::Triple::ppc64: + MultiarchIncludeDirs = PPC64MultiarchIncludeDirs; + break; +diff --git a/lib/Frontend/CompilerInvocation.cpp b/lib/Frontend/CompilerInvocation.cpp +index 73114c6d..a577e6dc 100644 +--- a/lib/Frontend/CompilerInvocation.cpp ++++ b/lib/Frontend/CompilerInvocation.cpp +@@ -3169,6 +3169,7 @@ static void ParseLangArgs(LangOptions &Opts, ArgList &Args, InputKind IK, + if (TT.getArch() == llvm::Triple::UnknownArch || + !(TT.getArch() == llvm::Triple::aarch64 || + TT.getArch() == llvm::Triple::ppc || ++ TT.getArch() == llvm::Triple::ppcle || + TT.getArch() == llvm::Triple::ppc64 || + TT.getArch() == llvm::Triple::ppc64le || + TT.getArch() == llvm::Triple::nvptx || +diff --git a/lib/Sema/SemaChecking.cpp b/lib/Sema/SemaChecking.cpp +index b00d2ff5..40f39654 100644 +--- a/lib/Sema/SemaChecking.cpp ++++ b/lib/Sema/SemaChecking.cpp +@@ -1425,6 +1425,7 @@ bool Sema::CheckTSBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, + case llvm::Triple::x86_64: + return CheckX86BuiltinFunctionCall(TI, BuiltinID, TheCall); + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::ppc64: + case llvm::Triple::ppc64le: + return CheckPPCBuiltinFunctionCall(TI, BuiltinID, TheCall); +diff --git a/test/CodeGen/altivec.c b/test/CodeGen/altivec.c +index a4d38fa2..7af963aa 100644 +--- a/test/CodeGen/altivec.c ++++ b/test/CodeGen/altivec.c +@@ -1,17 +1,22 @@ +-// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s ++// RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE ++// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE + + // Check initialization + + vector int test0 = (vector int)(1); // CHECK: @test0 = global <4 x i32> + vector float test1 = (vector float)(1.0); // CHECK: @test1 = global <4 x float> + +-// CHECK: @v1 = global <16 x i8> ++// CHECK-BE: @v1 = global <16 x i8> ++// CHECK-LE: @v1 = global <16 x i8> + vector char v1 = (vector char)((vector int)(1, 2, 3, 4)); +-// CHECK: @v2 = global <16 x i8> ++// CHECK-BE: @v2 = global <16 x i8> ++// CHECK-LE: @v2 = global <16 x i8> + vector char v2 = (vector char)((vector float)(1.0f, 2.0f, 3.0f, 4.0f)); +-// CHECK: @v3 = global <16 x i8> ++// CHECK-BE: @v3 = global <16 x i8> ++// CHECK-LE: @v3 = global <16 x i8> + vector char v3 = (vector char)((vector int)('a', 'b', 'c', 'd')); +-// CHECK: @v4 = global <4 x i32> ++// CHECK-BE: @v4 = global <4 x i32> ++// CHECK-LE: @v4 = global <4 x i32> + vector int v4 = (vector char){1, 2, 3, 4}; + + void test2() +diff --git a/test/CodeGen/builtins-ppc-altivec.c b/test/CodeGen/builtins-ppc-altivec.c +index 06f70a90..b29dc18a 100644 +--- a/test/CodeGen/builtins-ppc-altivec.c ++++ b/test/CodeGen/builtins-ppc-altivec.c +@@ -1,6 +1,8 @@ + // REQUIRES: powerpc-registered-target + // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown -emit-llvm %s \ + // RUN: -flax-vector-conversions=none -o - | FileCheck %s ++// RUN: %clang_cc1 -target-feature +altivec -triple powerpcle-unknown-unknown -emit-llvm %s \ ++// RUN: -flax-vector-conversions=none -o - | FileCheck %s -check-prefix=CHECK-LE + // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64-unknown-unknown -emit-llvm %s \ + // RUN: -flax-vector-conversions=none -o - | FileCheck %s + // RUN: %clang_cc1 -target-feature +altivec -triple powerpc64le-unknown-unknown -emit-llvm %s \ +diff --git a/test/CodeGen/ppc32-and-aix-struct-return.c b/test/CodeGen/ppc32-and-aix-struct-return.c +index 1e0fb928..41418a20 100644 +--- a/test/CodeGen/ppc32-and-aix-struct-return.c ++++ b/test/CodeGen/ppc32-and-aix-struct-return.c +@@ -11,6 +11,12 @@ + // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX + // RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \ + // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4 ++// RUN: %clang_cc1 -triple powerpcle-unknown-linux \ ++// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX ++// RUN: %clang_cc1 -triple powerpcle-unknown-linux -maix-struct-return \ ++// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX ++// RUN: %clang_cc1 -triple powerpcle-unknown-linux -msvr4-struct-return \ ++// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4 + // RUN: %clang_cc1 -triple powerpc-unknown-netbsd \ + // RUN: -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4 + // RUN: %clang_cc1 -triple powerpc-unknown-openbsd \ +diff --git a/test/CodeGen/target-data.c b/test/CodeGen/target-data.c +index 8c740119..239d0184 100644 +--- a/test/CodeGen/target-data.c ++++ b/test/CodeGen/target-data.c +@@ -122,6 +122,10 @@ + // RUN: FileCheck %s -check-prefix=PPC + // PPC: target datalayout = "E-m:e-p:32:32-i64:64-n32" + ++// RUN: %clang_cc1 -triple powerpcle-unknown -o - -emit-llvm %s | \ ++// RUN: FileCheck %s -check-prefix=PPCLE ++// PPCLE: target datalayout = "e-m:e-p:32:32-i64:64-n32" ++ + // RUN: %clang_cc1 -triple powerpc64-freebsd -o - -emit-llvm %s | \ + // RUN: FileCheck %s -check-prefix=PPC64-FREEBSD + // PPC64-FREEBSD: target datalayout = "E-m:e-i64:64-n32:64" +diff --git a/test/Driver/ppc-endian.c b/test/Driver/ppc-endian.c +index 4d8db389..00c1c25b 100644 +--- a/test/Driver/ppc-endian.c ++++ b/test/Driver/ppc-endian.c +@@ -1,9 +1,19 @@ +-// RUN: %clang -target powerpc64le -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s +-// RUN: %clang -target powerpc64le -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s +-// RUN: %clang -target powerpc64 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE %s +-// CHECK-LE: "-cc1"{{.*}} "-triple" "powerpc64le{{.*}}" ++// RUN: %clang -target powerpc-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s ++// RUN: %clang -target powerpc-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s ++// RUN: %clang -target powerpcle-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE32 %s ++// CHECK-BE32: "-cc1"{{.*}} "-triple" "powerpc-{{.*}}" + +-// RUN: %clang -target powerpc64 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s +-// RUN: %clang -target powerpc64 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s +-// RUN: %clang -target powerpc64le -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE %s +-// CHECK-BE: "-cc1"{{.*}} "-triple" "powerpc64{{.*}}" ++// RUN: %clang -target powerpcle-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s ++// RUN: %clang -target powerpcle-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s ++// RUN: %clang -target powerpc-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE32 %s ++// CHECK-LE32: "-cc1"{{.*}} "-triple" "powerpcle-{{.*}}" ++ ++// RUN: %clang -target powerpc64-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s ++// RUN: %clang -target powerpc64-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s ++// RUN: %clang -target powerpc64le-unknown -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE64 %s ++// CHECK-BE64: "-cc1"{{.*}} "-triple" "powerpc64-{{.*}}" ++ ++// RUN: %clang -target powerpc64le-unknown -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s ++// RUN: %clang -target powerpc64le-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s ++// RUN: %clang -target powerpc64-unknown -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-LE64 %s ++// CHECK-LE64: "-cc1"{{.*}} "-triple" "powerpc64le-{{.*}}" +-- +2.29.2 + diff --git a/srcpkgs/llvm11/files/patches/clang/clang-002-add-musl-triples.patch b/srcpkgs/llvm11/files/patches/clang/clang-002-add-musl-triples.patch index aefc88d48f5..bb40f2312ad 100644 --- a/srcpkgs/llvm11/files/patches/clang/clang-002-add-musl-triples.patch +++ b/srcpkgs/llvm11/files/patches/clang/clang-002-add-musl-triples.patch @@ -10,7 +10,7 @@ static const char *const ARMebLibDirs[] = {"/lib"}; static const char *const ARMebTriples[] = {"armeb-linux-gnueabi", "armeb-linux-androideabi"}; -@@ -2077,6 +2078,78 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes( +@@ -2077,6 +2078,87 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes( return; } @@ -27,6 +27,7 @@ + "mipsel-linux-muslhf", "mips-linux-muslhf" + }; + static const char *const PPCMuslTriples[] = {"powerpc-linux-musl"}; ++ static const char *const PPCLEMuslTriples[] = {"powerpcle-linux-musl"}; + static const char *const PPC64MuslTriples[] = {"powerpc64-linux-musl"}; + static const char *const PPC64LEMuslTriples[] = {"powerpc64le-linux-musl"}; + @@ -67,6 +68,12 @@ + BiarchLibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs)); + BiarchTripleAliases.append(begin(PPC64MuslTriples), end(PPC64MuslTriples)); + break; ++ case llvm::Triple::ppcle: ++ LibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs)); ++ TripleAliases.append(begin(PPCLEMuslTriples), end(PPCLEMuslTriples)); ++ BiarchLibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs)); ++ BiarchTripleAliases.append(begin(PPC64LEMuslTriples), end(PPC64LEMuslTriples)); ++ break; + case llvm::Triple::ppc64: + LibDirs.append(begin(PPC64LibDirs), end(PPC64LibDirs)); + TripleAliases.append(begin(PPC64MuslTriples), end(PPC64MuslTriples)); @@ -76,6 +83,8 @@ + case llvm::Triple::ppc64le: + LibDirs.append(begin(PPC64LELibDirs), end(PPC64LELibDirs)); + TripleAliases.append(begin(PPC64LEMuslTriples), end(PPC64LEMuslTriples)); ++ BiarchLibDirs.append(begin(PPCLELibDirs), end(PPCLELibDirs)); ++ BiarchTripleAliases.append(begin(PPCLEMuslTriples), end(PPCLEMuslTriples)); + break; + default: + break; diff --git a/srcpkgs/llvm11/files/patches/lld/lld-001-ppcle.patch b/srcpkgs/llvm11/files/patches/lld/lld-001-ppcle.patch new file mode 100644 index 00000000000..96479cdf39a --- /dev/null +++ b/srcpkgs/llvm11/files/patches/lld/lld-001-ppcle.patch @@ -0,0 +1,313 @@ +From c6347af7952635e21aaeca27c5ae6d81e29d9dbc Mon Sep 17 00:00:00 2001 +From: Daniel Kolesa +Date: Thu, 17 Dec 2020 03:20:31 +0100 +Subject: [PATCH] ppcle support + +based on https://reviews.llvm.org/D92445 +--- + ELF/Driver.cpp | 1 + + ELF/InputFiles.cpp | 1 + + ELF/ScriptParser.cpp | 1 + + test/ELF/emulation-ppc.s | 190 +++++++++++++++---------------------- + test/ELF/ppc32-gnu-ifunc.s | 6 ++ + test/ELF/ppc32-reloc-rel.s | 8 +- + 6 files changed, 91 insertions(+), 116 deletions(-) + +diff --git a/ELF/Driver.cpp b/ELF/Driver.cpp +index 4637a3b..d81b67c 100644 +--- a/ELF/Driver.cpp ++++ b/ELF/Driver.cpp +@@ -142,6 +142,7 @@ static std::tuple parseEmulation(StringRef emul) { + .Cases("elf32ltsmip", "elf32ltsmipn32", {ELF32LEKind, EM_MIPS}) + .Case("elf32lriscv", {ELF32LEKind, EM_RISCV}) + .Cases("elf32ppc", "elf32ppclinux", {ELF32BEKind, EM_PPC}) ++ .Cases("elf32lppc", "elf32lppclinux", {ELF32LEKind, EM_PPC}) + .Case("elf64btsmip", {ELF64BEKind, EM_MIPS}) + .Case("elf64ltsmip", {ELF64LEKind, EM_MIPS}) + .Case("elf64lriscv", {ELF64LEKind, EM_RISCV}) +diff --git a/ELF/InputFiles.cpp b/ELF/InputFiles.cpp +index c2f1830..f83f028 100644 +--- a/ELF/InputFiles.cpp ++++ b/ELF/InputFiles.cpp +@@ -1514,6 +1514,7 @@ static uint8_t getBitcodeMachineKind(StringRef path, const Triple &t) { + case Triple::msp430: + return EM_MSP430; + case Triple::ppc: ++ case Triple::ppcle: + return EM_PPC; + case Triple::ppc64: + case Triple::ppc64le: +diff --git a/ELF/ScriptParser.cpp b/ELF/ScriptParser.cpp +index fea6b7a..99b3e15 100644 +--- a/ELF/ScriptParser.cpp ++++ b/ELF/ScriptParser.cpp +@@ -410,6 +410,7 @@ static std::pair parseBfdName(StringRef s) { + .Case("elf64-aarch64", {ELF64LEKind, EM_AARCH64}) + .Case("elf64-littleaarch64", {ELF64LEKind, EM_AARCH64}) + .Case("elf32-powerpc", {ELF32BEKind, EM_PPC}) ++ .Case("elf32-powerpcle", {ELF32LEKind, EM_PPC}) + .Case("elf64-powerpc", {ELF64BEKind, EM_PPC64}) + .Case("elf64-powerpcle", {ELF64LEKind, EM_PPC64}) + .Case("elf64-x86-64", {ELF64LEKind, EM_X86_64}) +diff --git a/test/ELF/emulation-ppc.s b/test/ELF/emulation-ppc.s +index def78a5..004eb23 100644 +--- a/test/ELF/emulation-ppc.s ++++ b/test/ELF/emulation-ppc.s +@@ -1,144 +1,106 @@ + # REQUIRES: ppc + # RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %tppc64 + # RUN: ld.lld -m elf64ppc %tppc64 -o %t2ppc64 +-# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefix=PPC64 %s ++# RUN: llvm-readobj --file-headers %t2ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s + # RUN: ld.lld %tppc64 -o %t3ppc64 +-# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefix=PPC64 %s ++# RUN: llvm-readobj --file-headers %t3ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s + # RUN: echo 'OUTPUT_FORMAT(elf64-powerpc)' > %tppc64.script + # RUN: ld.lld %tppc64.script %tppc64 -o %t4ppc64 +-# RUN: llvm-readobj --file-headers %t4ppc64 | FileCheck --check-prefix=PPC64 %s +- +-# PPC64: ElfHeader { +-# PPC64-NEXT: Ident { +-# PPC64-NEXT: Magic: (7F 45 4C 46) +-# PPC64-NEXT: Class: 64-bit (0x2) +-# PPC64-NEXT: DataEncoding: BigEndian (0x2) +-# PPC64-NEXT: FileVersion: 1 +-# PPC64-NEXT: OS/ABI: SystemV (0x0) +-# PPC64-NEXT: ABIVersion: 0 +-# PPC64-NEXT: Unused: (00 00 00 00 00 00 00) +-# PPC64-NEXT: } +-# PPC64-NEXT: Type: Executable (0x2) +-# PPC64-NEXT: Machine: EM_PPC64 (0x15) +-# PPC64-NEXT: Version: 1 +-# PPC64-NEXT: Entry: +-# PPC64-NEXT: ProgramHeaderOffset: 0x40 +-# PPC64-NEXT: SectionHeaderOffset: +-# PPC64-NEXT: Flags [ (0x2) +-# PPC64-NEXT: 0x2 +-# PPC64-NEXT: ] +-# PPC64-NEXT: HeaderSize: 64 +-# PPC64-NEXT: ProgramHeaderEntrySize: 56 +-# PPC64-NEXT: ProgramHeaderCount: +-# PPC64-NEXT: SectionHeaderEntrySize: 64 +-# PPC64-NEXT: SectionHeaderCount: +-# PPC64-NEXT: StringTableSectionIndex: +-# PPC64-NEXT: } +- +-# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-freebsd %s -o %tppc64fbsd +-# RUN: echo 'OUTPUT_FORMAT(elf64-powerpc-freebsd)' > %tppc64fbsd.script +-# RUN: ld.lld %tppc64fbsd.script %tppc64fbsd -o %t2ppc64fbsd +-# RUN: llvm-readobj --file-headers %t2ppc64fbsd | FileCheck --check-prefix=PPC64-FBSD %s +- +-# PPC64-FBSD: ElfHeader { +-# PPC64-FBSD-NEXT: Ident { +-# PPC64-FBSD-NEXT: Magic: (7F 45 4C 46) +-# PPC64-FBSD-NEXT: Class: 64-bit (0x2) +-# PPC64-FBSD-NEXT: DataEncoding: BigEndian (0x2) +-# PPC64-FBSD-NEXT: FileVersion: 1 +-# PPC64-FBSD-NEXT: OS/ABI: FreeBSD (0x9) +-# PPC64-FBSD-NEXT: ABIVersion: 0 +-# PPC64-FBSD-NEXT: Unused: (00 00 00 00 00 00 00) +-# PPC64-FBSD-NEXT: } +-# PPC64-FBSD-NEXT: Type: Executable (0x2) +-# PPC64-FBSD-NEXT: Machine: EM_PPC64 (0x15) +-# PPC64-FBSD-NEXT: Version: 1 +-# PPC64-FBSD-NEXT: Entry: +-# PPC64-FBSD-NEXT: ProgramHeaderOffset: 0x40 +-# PPC64-FBSD-NEXT: SectionHeaderOffset: +-# PPC64-FBSD-NEXT: Flags [ (0x2) +-# PPC64-FBSD-NEXT: 0x2 +-# PPC64-FBSD-NEXT: ] +-# PPC64-FBSD-NEXT: HeaderSize: 64 +-# PPC64-FBSD-NEXT: ProgramHeaderEntrySize: 56 +-# PPC64-FBSD-NEXT: ProgramHeaderCount: +-# PPC64-FBSD-NEXT: SectionHeaderEntrySize: 64 +-# PPC64-FBSD-NEXT: SectionHeaderCount: +-# PPC64-FBSD-NEXT: StringTableSectionIndex: +-# PPC64-FBSD-NEXT: } ++# RUN: llvm-readobj --file-headers %t4ppc64 | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCBE %s + + # RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %tppc64le + # RUN: ld.lld -m elf64lppc %tppc64le -o %t2ppc64le +-# RUN: llvm-readobj --file-headers %t2ppc64le | FileCheck --check-prefix=PPC64LE %s ++# RUN: llvm-readobj --file-headers %t2ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s + # RUN: ld.lld %tppc64le -o %t3ppc64le +-# RUN: llvm-readobj --file-headers %t3ppc64le | FileCheck --check-prefix=PPC64LE %s ++# RUN: llvm-readobj --file-headers %t3ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s + # RUN: echo 'OUTPUT_FORMAT(elf64-powerpcle)' > %tppc64le.script + # RUN: ld.lld %tppc64le.script %tppc64le -o %t4ppc64le +-# RUN: llvm-readobj --file-headers %t4ppc64le | FileCheck --check-prefix=PPC64LE %s +- +-# PPC64LE: ElfHeader { +-# PPC64LE-NEXT: Ident { +-# PPC64LE-NEXT: Magic: (7F 45 4C 46) +-# PPC64LE-NEXT: Class: 64-bit (0x2) +-# PPC64LE-NEXT: DataEncoding: LittleEndian (0x1) +-# PPC64LE-NEXT: FileVersion: 1 +-# PPC64LE-NEXT: OS/ABI: SystemV (0x0) +-# PPC64LE-NEXT: ABIVersion: 0 +-# PPC64LE-NEXT: Unused: (00 00 00 00 00 00 00) +-# PPC64LE-NEXT: } +-# PPC64LE-NEXT: Type: Executable (0x2) +-# PPC64LE-NEXT: Machine: EM_PPC64 (0x15) +-# PPC64LE-NEXT: Version: 1 +-# PPC64LE-NEXT: Entry: +-# PPC64LE-NEXT: ProgramHeaderOffset: 0x40 +-# PPC64LE-NEXT: SectionHeaderOffset: +-# PPC64LE-NEXT: Flags [ (0x2) +-# PPC64LE-NEXT: 0x2 +-# PPC64LE-NEXT: ] +-# PPC64LE-NEXT: HeaderSize: 64 +-# PPC64LE-NEXT: ProgramHeaderEntrySize: 56 +-# PPC64LE-NEXT: ProgramHeaderCount: +-# PPC64LE-NEXT: SectionHeaderEntrySize: 64 +-# PPC64LE-NEXT: SectionHeaderCount: +-# PPC64LE-NEXT: StringTableSectionIndex: +-# PPC64LE-NEXT: } ++# RUN: llvm-readobj --file-headers %t4ppc64le | FileCheck --check-prefixes=CHECK,PPC64,LINUX,PPCLE %s + + # RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-linux %s -o %tppc32 + # RUN: ld.lld -m elf32ppc %tppc32 -o %t2ppc32 +-# RUN: llvm-readobj --file-headers %t2ppc32 | FileCheck --check-prefix=PPC32 %s ++# RUN: llvm-readobj --file-headers %t2ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s + # RUN: ld.lld %tppc32 -o %t3ppc32 +-# RUN: llvm-readobj --file-headers %t3ppc32 | FileCheck --check-prefix=PPC32 %s ++# RUN: llvm-readobj --file-headers %t3ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s + # RUN: echo 'OUTPUT_FORMAT(elf32-powerpc)' > %tppc32.script + # RUN: ld.lld %tppc32.script %tppc32 -o %t4ppc32 +-# RUN: llvm-readobj --file-headers %t4ppc32 | FileCheck --check-prefix=PPC32 %s ++# RUN: llvm-readobj --file-headers %t4ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s + # RUN: ld.lld -m elf32ppclinux %tppc32 -o %t5ppc32 +-# RUN: llvm-readobj --file-headers %t5ppc32 | FileCheck --check-prefix=PPC32 %s ++# RUN: llvm-readobj --file-headers %t5ppc32 | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCBE %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpcle-unknown-linux %s -o %tppc32le ++# RUN: ld.lld -m elf32lppc %tppc32le -o %t2ppc32le ++# RUN: llvm-readobj --file-headers %t2ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s ++# RUN: ld.lld %tppc32le -o %t3ppc32le ++# RUN: llvm-readobj --file-headers %t3ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s ++# RUN: echo 'OUTPUT_FORMAT(elf32-powerpcle)' > %tppc32le.script ++# RUN: ld.lld %tppc32le.script %tppc32le -o %t4ppc32le ++# RUN: llvm-readobj --file-headers %t4ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s ++# RUN: ld.lld -m elf32lppclinux %tppc32le -o %t5ppc32le ++# RUN: llvm-readobj --file-headers %t5ppc32le | FileCheck --check-prefixes=CHECK,PPC32,LINUX,PPCLE %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpc-unknown-freebsd %s -o %tppc32fbsd ++# RUN: echo 'OUTPUT_FORMAT(elf32-powerpc-freebsd)' > %tppc32fbsd.script ++# RUN: ld.lld %tppc32fbsd.script %tppc32fbsd -o %t2ppc32fbsd ++# RUN: llvm-readobj --file-headers %t2ppc32fbsd | FileCheck --check-prefixes=CHECK,PPC32,FBSD,PPCBE %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpcle-unknown-freebsd %s -o %tppc32fbsdle ++# RUN: echo 'OUTPUT_FORMAT(elf32-powerpcle-freebsd)' > %tppc32fbsdle.script ++# RUN: ld.lld %tppc32fbsdle.script %tppc32fbsdle -o %t2ppc32fbsdle ++# RUN: llvm-readobj --file-headers %t2ppc32fbsdle | FileCheck --check-prefixes=CHECK,PPC32,FBSD,PPCLE %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-freebsd %s -o %tppc64fbsd ++# RUN: echo 'OUTPUT_FORMAT(elf64-powerpc-freebsd)' > %tppc64fbsd.script ++# RUN: ld.lld %tppc64fbsd.script %tppc64fbsd -o %t2ppc64fbsd ++# RUN: llvm-readobj --file-headers %t2ppc64fbsd | FileCheck --check-prefixes=CHECK,PPC64,FBSD,PPCBE %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-freebsd %s -o %tppc64fbsdle ++# RUN: echo 'OUTPUT_FORMAT(elf64-powerpcle-freebsd)' > %tppc64fbsdle.script ++# RUN: ld.lld %tppc64fbsdle.script %tppc64fbsdle -o %t2ppc64fbsdle ++# RUN: llvm-readobj --file-headers %t2ppc64fbsdle | FileCheck --check-prefixes=CHECK,PPC64,FBSD,PPCLE %s + +-# PPC32: ElfHeader { +-# PPC32-NEXT: Ident { +-# PPC32-NEXT: Magic: (7F 45 4C 46) ++# CHECK: ElfHeader { ++# CHECK-NEXT: Ident { ++# CHECK-NEXT: Magic: (7F 45 4C 46) ++ ++# PPC64-NEXT: Class: 64-bit (0x2) + # PPC32-NEXT: Class: 32-bit (0x1) +-# PPC32-NEXT: DataEncoding: BigEndian (0x2) +-# PPC32-NEXT: FileVersion: 1 +-# PPC32-NEXT: OS/ABI: SystemV (0x0) +-# PPC32-NEXT: ABIVersion: 0 +-# PPC32-NEXT: Unused: (00 00 00 00 00 00 00) +-# PPC32-NEXT: } +-# PPC32-NEXT: Type: Executable (0x2) ++ ++# PPCBE-NEXT: DataEncoding: BigEndian (0x2) ++# PPCLE-NEXT: DataEncoding: LittleEndian (0x1) ++ ++# CHECK-NEXT: FileVersion: 1 ++ ++# LINUX-NEXT: OS/ABI: SystemV (0x0) ++# FBSD-NEXT: OS/ABI: FreeBSD (0x9) ++ ++# CHECK-NEXT: ABIVersion: 0 ++# CHECK-NEXT: Unused: (00 00 00 00 00 00 00) ++# CHECK-NEXT: } ++# CHECK-NEXT: Type: Executable (0x2) ++ ++# PPC64-NEXT: Machine: EM_PPC64 (0x15) + # PPC32-NEXT: Machine: EM_PPC (0x14) +-# PPC32-NEXT: Version: 1 +-# PPC32-NEXT: Entry: ++ ++# CHECK-NEXT: Version: 1 ++# CHECK-NEXT: Entry: ++# PPC64-NEXT: ProgramHeaderOffset: 0x40 + # PPC32-NEXT: ProgramHeaderOffset: 0x34 +-# PPC32-NEXT: SectionHeaderOffset: ++# CHECK-NEXT: SectionHeaderOffset: ++# PPC64-NEXT: Flags [ (0x2) + # PPC32-NEXT: Flags [ (0x0) +-# PPC32-NEXT: ] ++# PPC64-NEXT: 0x2 ++# CHECK-NEXT: ] ++# PPC64-NEXT: HeaderSize: 64 + # PPC32-NEXT: HeaderSize: 52 ++# PPC64-NEXT: ProgramHeaderEntrySize: 56 + # PPC32-NEXT: ProgramHeaderEntrySize: 32 +-# PPC32-NEXT: ProgramHeaderCount: ++# CHECK-NEXT: ProgramHeaderCount: ++# PPC64-NEXT: SectionHeaderEntrySize: 64 + # PPC32-NEXT: SectionHeaderEntrySize: 40 +-# PPC32-NEXT: SectionHeaderCount: +-# PPC32-NEXT: StringTableSectionIndex: +-# PPC32-NEXT: } ++# CHECK-NEXT: SectionHeaderCount: ++# CHECK-NEXT: StringTableSectionIndex: ++# CHECK-NEXT: } + + .globl _start + _start: +diff --git a/test/ELF/ppc32-gnu-ifunc.s b/test/ELF/ppc32-gnu-ifunc.s +index b85b9eb..66efd5e 100644 +--- a/test/ELF/ppc32-gnu-ifunc.s ++++ b/test/ELF/ppc32-gnu-ifunc.s +@@ -5,6 +5,12 @@ + # RUN: llvm-readelf -S -s %t | FileCheck --check-prefixes=SEC,SYM %s + # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s + ++# RUN: llvm-mc -filetype=obj -triple=powerpcle %s -o %t.o ++# RUN: ld.lld %t.o -o %t ++# RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s ++# RUN: llvm-readelf -S -s %t | FileCheck --check-prefixes=SEC,SYM %s ++# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s ++ + # RELOC: .rela.dyn { + # RELOC-NEXT: 0x10020118 R_PPC_IRELATIVE - 0x100100E0 + # RELOC-NEXT: } +diff --git a/test/ELF/ppc32-reloc-rel.s b/test/ELF/ppc32-reloc-rel.s +index fefeeba..29501fd 100644 +--- a/test/ELF/ppc32-reloc-rel.s ++++ b/test/ELF/ppc32-reloc-rel.s +@@ -1,6 +1,10 @@ + # REQUIRES: ppc +-# RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.o +-# RUN: ld.lld %t.o -o %t ++# RUN: llvm-mc -filetype=obj -triple=powerpc %s -o %t.be.o ++# RUN: ld.lld %t.be.o -o %t ++# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s ++ ++# RUN: llvm-mc -filetype=obj -triple=powerpcle %s -o %t.le.o ++# RUN: ld.lld %t.le.o -o %t + # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s + + .section .R_PPC_REL14,"ax",@progbits +-- +2.29.2 + diff --git a/srcpkgs/llvm11/files/patches/llvm/llvm-002-ppcle.patch b/srcpkgs/llvm11/files/patches/llvm/llvm-002-ppcle.patch new file mode 100644 index 00000000000..fe249f413e0 --- /dev/null +++ b/srcpkgs/llvm11/files/patches/llvm/llvm-002-ppcle.patch @@ -0,0 +1,610 @@ +From da7672c80844644c410fcd65f0bdb1a4a48d83ec Mon Sep 17 00:00:00 2001 +From: Daniel Kolesa +Date: Thu, 17 Dec 2020 03:43:16 +0100 +Subject: [PATCH] ppcle support + +based on https://reviews.llvm.org/D92445 +--- + include/llvm/ADT/Triple.h | 12 +++++++ + include/llvm/Frontend/OpenMP/OMPKinds.def | 1 + + include/llvm/Object/ELFObjectFile.h | 4 +-- + lib/CodeGen/TargetLoweringBase.cpp | 2 +- + lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 1 + + .../RuntimeDyld/RuntimeDyldELF.cpp | 3 +- + lib/Frontend/OpenMP/OMPContext.cpp | 1 + + lib/Object/RelocationResolver.cpp | 1 + + lib/Support/Triple.cpp | 17 ++++++++-- + lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 5 +-- + .../PowerPC/Disassembler/PPCDisassembler.cpp | 2 ++ + .../PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 5 +-- + .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 4 +-- + lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 ++ + lib/Target/PowerPC/PPCSubtarget.cpp | 3 +- + lib/Target/PowerPC/PPCTargetMachine.cpp | 9 +++--- + .../PowerPC/TargetInfo/PowerPCTargetInfo.cpp | 9 +++++- + .../PowerPC/TargetInfo/PowerPCTargetInfo.h | 1 + + lib/Target/TargetMachine.cpp | 2 +- + .../ELF/binary-output-target.test | 23 +++++++++---- + .../llvm-objcopy/ELF/cross-arch-headers.test | 32 +++++++++---------- + .../llvm-objdump/ELF/PowerPC/branch-offset.s | 15 +++++---- + 22 files changed, 106 insertions(+), 48 deletions(-) + +diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h +index 6bad18f1..013bbe1d 100644 +--- a/include/llvm/ADT/Triple.h ++++ b/include/llvm/ADT/Triple.h +@@ -63,6 +63,7 @@ public: + mips64el, // MIPS64EL: mips64el, mips64r6el, mipsn32el, mipsn32r6el + msp430, // MSP430: msp430 + ppc, // PPC: powerpc ++ ppcle, // PPCLE: powerpc (little endian) + ppc64, // PPC64: powerpc64, ppu + ppc64le, // PPC64LE: powerpc64le + r600, // R600: AMD GPUs HD2XXX - HD6XXX +@@ -721,6 +722,17 @@ public: + return isMIPS32() || isMIPS64(); + } + ++ /// Tests whether the target is PowerPC (32- or 64-bit LE or BE). ++ bool isPPC() const { ++ return getArch() == Triple::ppc || getArch() == Triple::ppc64 || ++ getArch() == Triple::ppcle || getArch() == Triple::ppc64le; ++ } ++ ++ /// Tests whether the target is 32-bit PowerPC (little and big endian). ++ bool isPPC32() const { ++ return getArch() == Triple::ppc || getArch() == Triple::ppcle; ++ } ++ + /// Tests whether the target is 64-bit PowerPC (little and big endian). + bool isPPC64() const { + return getArch() == Triple::ppc64 || getArch() == Triple::ppc64le; +diff --git a/include/llvm/Frontend/OpenMP/OMPKinds.def b/include/llvm/Frontend/OpenMP/OMPKinds.def +index 93ea63c1..42af0443 100644 +--- a/include/llvm/Frontend/OpenMP/OMPKinds.def ++++ b/include/llvm/Frontend/OpenMP/OMPKinds.def +@@ -1078,6 +1078,7 @@ __OMP_TRAIT_PROPERTY(device, arch, aarch64) + __OMP_TRAIT_PROPERTY(device, arch, aarch64_be) + __OMP_TRAIT_PROPERTY(device, arch, aarch64_32) + __OMP_TRAIT_PROPERTY(device, arch, ppc) ++__OMP_TRAIT_PROPERTY(device, arch, ppcle) + __OMP_TRAIT_PROPERTY(device, arch, ppc64) + __OMP_TRAIT_PROPERTY(device, arch, ppc64le) + __OMP_TRAIT_PROPERTY(device, arch, x86) +diff --git a/include/llvm/Object/ELFObjectFile.h b/include/llvm/Object/ELFObjectFile.h +index 62ecd8b5..eecec520 100644 +--- a/include/llvm/Object/ELFObjectFile.h ++++ b/include/llvm/Object/ELFObjectFile.h +@@ -1106,7 +1106,7 @@ StringRef ELFObjectFile::getFileFormatName() const { + case ELF::EM_MSP430: + return "elf32-msp430"; + case ELF::EM_PPC: +- return "elf32-powerpc"; ++ return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc"); + case ELF::EM_RISCV: + return "elf32-littleriscv"; + case ELF::EM_SPARC: +@@ -1180,7 +1180,7 @@ template Triple::ArchType ELFObjectFile::getArch() const { + case ELF::EM_MSP430: + return Triple::msp430; + case ELF::EM_PPC: +- return Triple::ppc; ++ return IsLittleEndian ? Triple::ppcle : Triple::ppc; + case ELF::EM_PPC64: + return IsLittleEndian ? Triple::ppc64le : Triple::ppc64; + case ELF::EM_RISCV: +diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp +index 42c1fa8a..527a4cd5 100644 +--- a/lib/CodeGen/TargetLoweringBase.cpp ++++ b/lib/CodeGen/TargetLoweringBase.cpp +@@ -135,7 +135,7 @@ void TargetLoweringBase::InitLibcalls(const Triple &TT) { + setLibcallCallingConv((RTLIB::Libcall)LC, CallingConv::C); + + // For IEEE quad-precision libcall names, PPC uses "kf" instead of "tf". +- if (TT.getArch() == Triple::ppc || TT.isPPC64()) { ++ if (TT.isPPC()) { + setLibcallName(RTLIB::ADD_F128, "__addkf3"); + setLibcallName(RTLIB::SUB_F128, "__subkf3"); + setLibcallName(RTLIB::MUL_F128, "__mulkf3"); +diff --git a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +index 27bebe50..963b3f77 100644 +--- a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp ++++ b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +@@ -122,6 +122,7 @@ void TargetLoweringObjectFileELF::Initialize(MCContext &Ctx, + // Fallthrough if not using EHABI + LLVM_FALLTHROUGH; + case Triple::ppc: ++ case Triple::ppcle: + case Triple::x86: + PersonalityEncoding = isPositionIndependent() + ? dwarf::DW_EH_PE_indirect | +diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp +index 7ed8a718..7ebfa6ac 100644 +--- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp ++++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp +@@ -961,7 +961,8 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section, + resolveARMRelocation(Section, Offset, (uint32_t)(Value & 0xffffffffL), Type, + (uint32_t)(Addend & 0xffffffffL)); + break; +- case Triple::ppc: ++ case Triple::ppc: // Fall through. ++ case Triple::ppcle: + resolvePPC32Relocation(Section, Offset, Value, Type, Addend); + break; + case Triple::ppc64: // Fall through. +diff --git a/lib/Frontend/OpenMP/OMPContext.cpp b/lib/Frontend/OpenMP/OMPContext.cpp +index c44e858a..f148008d 100644 +--- a/lib/Frontend/OpenMP/OMPContext.cpp ++++ b/lib/Frontend/OpenMP/OMPContext.cpp +@@ -40,6 +40,7 @@ OMPContext::OMPContext(bool IsDeviceCompilation, Triple TargetTriple) { + case Triple::mips64: + case Triple::mips64el: + case Triple::ppc: ++ case Triple::ppcle: + case Triple::ppc64: + case Triple::ppc64le: + case Triple::x86: +diff --git a/lib/Object/RelocationResolver.cpp b/lib/Object/RelocationResolver.cpp +index ad7a50d1..4a195a8d 100644 +--- a/lib/Object/RelocationResolver.cpp ++++ b/lib/Object/RelocationResolver.cpp +@@ -645,6 +645,7 @@ getRelocationResolver(const ObjectFile &Obj) { + switch (Obj.getArch()) { + case Triple::x86: + return {supportsX86, resolveX86}; ++ case Triple::ppcle: + case Triple::ppc: + return {supportsPPC32, resolvePPC32}; + case Triple::arm: +diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp +index fec1985c..c075ee45 100644 +--- a/lib/Support/Triple.cpp ++++ b/lib/Support/Triple.cpp +@@ -53,6 +53,7 @@ StringRef Triple::getArchTypeName(ArchType Kind) { + case ppc64: return "powerpc64"; + case ppc64le: return "powerpc64le"; + case ppc: return "powerpc"; ++ case ppcle: return "powerpcle"; + case r600: return "r600"; + case renderscript32: return "renderscript32"; + case renderscript64: return "renderscript64"; +@@ -100,7 +101,8 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { + + case ppc64: + case ppc64le: +- case ppc: return "ppc"; ++ case ppc: ++ case ppcle: return "ppc"; + + case mips: + case mipsel: +@@ -286,6 +288,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) { + .Case("ppc64", ppc64) + .Case("ppc32", ppc) + .Case("ppc", ppc) ++ .Case("ppc32le", ppcle) ++ .Case("ppcle", ppcle) + .Case("ppc64le", ppc64le) + .Case("r600", r600) + .Case("amdgcn", amdgcn) +@@ -396,6 +400,7 @@ static Triple::ArchType parseArch(StringRef ArchName) { + .Cases("i786", "i886", "i986", Triple::x86) + .Cases("amd64", "x86_64", "x86_64h", Triple::x86_64) + .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc) ++ .Cases("powerpcle", "ppcle", "ppc32le", Triple::ppcle) + .Cases("powerpc64", "ppu", "ppc64", Triple::ppc64) + .Cases("powerpc64le", "ppc64le", Triple::ppc64le) + .Case("xscale", Triple::arm) +@@ -695,6 +700,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) { + case Triple::nvptx64: + case Triple::nvptx: + case Triple::ppc64le: ++ case Triple::ppcle: + case Triple::r600: + case Triple::renderscript32: + case Triple::renderscript64: +@@ -1258,6 +1264,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) { + case llvm::Triple::mipsel: + case llvm::Triple::nvptx: + case llvm::Triple::ppc: ++ case llvm::Triple::ppcle: + case llvm::Triple::r600: + case llvm::Triple::renderscript32: + case llvm::Triple::riscv32: +@@ -1321,7 +1328,6 @@ Triple Triple::get32BitArchVariant() const { + case Triple::bpfeb: + case Triple::bpfel: + case Triple::msp430: +- case Triple::ppc64le: + case Triple::systemz: + case Triple::ve: + T.setArch(UnknownArch); +@@ -1341,6 +1347,7 @@ Triple Triple::get32BitArchVariant() const { + case Triple::mipsel: + case Triple::nvptx: + case Triple::ppc: ++ case Triple::ppcle: + case Triple::r600: + case Triple::renderscript32: + case Triple::riscv32: +@@ -1367,6 +1374,7 @@ Triple Triple::get32BitArchVariant() const { + case Triple::mips64el: T.setArch(Triple::mipsel); break; + case Triple::nvptx64: T.setArch(Triple::nvptx); break; + case Triple::ppc64: T.setArch(Triple::ppc); break; ++ case Triple::ppc64le: T.setArch(Triple::ppcle); break; + case Triple::renderscript64: T.setArch(Triple::renderscript32); break; + case Triple::riscv64: T.setArch(Triple::riscv32); break; + case Triple::sparcv9: T.setArch(Triple::sparc); break; +@@ -1430,6 +1438,7 @@ Triple Triple::get64BitArchVariant() const { + case Triple::mipsel: T.setArch(Triple::mips64el); break; + case Triple::nvptx: T.setArch(Triple::nvptx64); break; + case Triple::ppc: T.setArch(Triple::ppc64); break; ++ case Triple::ppcle: T.setArch(Triple::ppc64le); break; + case Triple::renderscript32: T.setArch(Triple::renderscript64); break; + case Triple::riscv32: T.setArch(Triple::riscv64); break; + case Triple::sparc: T.setArch(Triple::sparcv9); break; +@@ -1488,6 +1497,7 @@ Triple Triple::getBigEndianArchVariant() const { + case Triple::bpfel: T.setArch(Triple::bpfeb); break; + case Triple::mips64el:T.setArch(Triple::mips64); break; + case Triple::mipsel: T.setArch(Triple::mips); break; ++ case Triple::ppcle: T.setArch(Triple::ppc); break; + case Triple::ppc64le: T.setArch(Triple::ppc64); break; + case Triple::sparcel: T.setArch(Triple::sparc); break; + case Triple::tcele: T.setArch(Triple::tce); break; +@@ -1505,7 +1515,6 @@ Triple Triple::getLittleEndianArchVariant() const { + switch (getArch()) { + case Triple::UnknownArch: + case Triple::lanai: +- case Triple::ppc: + case Triple::sparcv9: + case Triple::systemz: + +@@ -1520,6 +1529,7 @@ Triple Triple::getLittleEndianArchVariant() const { + case Triple::bpfeb: T.setArch(Triple::bpfel); break; + case Triple::mips64: T.setArch(Triple::mips64el); break; + case Triple::mips: T.setArch(Triple::mipsel); break; ++ case Triple::ppc: T.setArch(Triple::ppcle); break; + case Triple::ppc64: T.setArch(Triple::ppc64le); break; + case Triple::sparc: T.setArch(Triple::sparcel); break; + case Triple::tce: T.setArch(Triple::tcele); break; +@@ -1550,6 +1560,7 @@ bool Triple::isLittleEndian() const { + case Triple::msp430: + case Triple::nvptx64: + case Triple::nvptx: ++ case Triple::ppcle: + case Triple::ppc64le: + case Triple::r600: + case Triple::renderscript32: +diff --git a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +index 13fd7d05..dbd8e933 100644 +--- a/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp ++++ b/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +@@ -1809,8 +1809,9 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) { + /// Force static initialization. + extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() { + RegisterMCAsmParser A(getThePPC32Target()); +- RegisterMCAsmParser B(getThePPC64Target()); +- RegisterMCAsmParser C(getThePPC64LETarget()); ++ RegisterMCAsmParser B(getThePPC32LETarget()); ++ RegisterMCAsmParser C(getThePPC64Target()); ++ RegisterMCAsmParser D(getThePPC64LETarget()); + } + + #define GET_REGISTER_MATCHER +diff --git a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +index 74c6fd37..4ddaa96d 100644 +--- a/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp ++++ b/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +@@ -54,6 +54,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() { + // Register the disassembler for each target. + TargetRegistry::RegisterMCDisassembler(getThePPC32Target(), + createPPCDisassembler); ++ TargetRegistry::RegisterMCDisassembler(getThePPC32LETarget(), ++ createPPCLEDisassembler); + TargetRegistry::RegisterMCDisassembler(getThePPC64Target(), + createPPCDisassembler); + TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(), +diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +index 593dc284..2b76af27 100644 +--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp ++++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp +@@ -26,7 +26,8 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { + if (is64Bit) { + CodePointerSize = CalleeSaveStackSlotSize = 8; + } +- IsLittleEndian = T.getArch() == Triple::ppc64le; ++ IsLittleEndian = ++ T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle; + + // ".comm align is in bytes but .align is pow-2." + AlignmentIsInBytes = false; +@@ -56,7 +57,7 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) { + void PPCXCOFFMCAsmInfo::anchor() {} + + PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) { +- if (T.getArch() == Triple::ppc64le) ++ if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle) + report_fatal_error("XCOFF is not supported for little-endian targets"); + CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4; + +diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +index 3092d56d..748df7d2 100644 +--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp ++++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +@@ -334,8 +334,8 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T, + } + + extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() { +- for (Target *T : +- {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) { ++ for (Target *T : {&getThePPC32Target(), &getThePPC32LETarget(), ++ &getThePPC64Target(), &getThePPC64LETarget()}) { + // Register the MC asm info. + RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo); + +diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp +index bf5fe741..0d8a419a 100644 +--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp ++++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp +@@ -1829,6 +1829,8 @@ createPPCAsmPrinterPass(TargetMachine &tm, + extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() { + TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), + createPPCAsmPrinterPass); ++ TargetRegistry::RegisterAsmPrinter(getThePPC32LETarget(), ++ createPPCAsmPrinterPass); + TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), + createPPCAsmPrinterPass); + TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(), +diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp +index 3836cc96..eff8fa46 100644 +--- a/lib/Target/PowerPC/PPCSubtarget.cpp ++++ b/lib/Target/PowerPC/PPCSubtarget.cpp +@@ -174,7 +174,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { + + // Determine endianness. + // FIXME: Part of the TargetMachine. +- IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le); ++ IsLittleEndian = (TargetTriple.getArch() == Triple::ppc64le || ++ TargetTriple.getArch() == Triple::ppcle); + } + + bool PPCSubtarget::enableMachineScheduler() const { return true; } +diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp +index f15f9c7f..a68535be 100644 +--- a/lib/Target/PowerPC/PPCTargetMachine.cpp ++++ b/lib/Target/PowerPC/PPCTargetMachine.cpp +@@ -98,8 +98,9 @@ static cl::opt + extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() { + // Register the targets + RegisterTargetMachine A(getThePPC32Target()); +- RegisterTargetMachine B(getThePPC64Target()); +- RegisterTargetMachine C(getThePPC64LETarget()); ++ RegisterTargetMachine B(getThePPC32LETarget()); ++ RegisterTargetMachine C(getThePPC64Target()); ++ RegisterTargetMachine D(getThePPC64LETarget()); + + PassRegistry &PR = *PassRegistry::getPassRegistry(); + #ifndef NDEBUG +@@ -128,8 +129,8 @@ static std::string getDataLayoutString(const Triple &T) { + bool is64Bit = T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le; + std::string Ret; + +- // Most PPC* platforms are big endian, PPC64LE is little endian. +- if (T.getArch() == Triple::ppc64le) ++ // Most PPC* platforms are big endian, PPC(64)LE is little endian. ++ if (T.getArch() == Triple::ppc64le || T.getArch() == Triple::ppcle) + Ret = "e"; + else + Ret = "E"; +diff --git a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp +index 649bd648..6bb952f2 100644 +--- a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp ++++ b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp +@@ -14,6 +14,10 @@ Target &llvm::getThePPC32Target() { + static Target ThePPC32Target; + return ThePPC32Target; + } ++Target &llvm::getThePPC32LETarget() { ++ static Target ThePPC32LETarget; ++ return ThePPC32LETarget; ++} + Target &llvm::getThePPC64Target() { + static Target ThePPC64Target; + return ThePPC64Target; +@@ -24,9 +28,12 @@ Target &llvm::getThePPC64LETarget() { + } + + extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetInfo() { +- RegisterTarget X(getThePPC32Target(), "ppc32", ++ RegisterTarget W(getThePPC32Target(), "ppc32", + "PowerPC 32", "PPC"); + ++ RegisterTarget X( ++ getThePPC32LETarget(), "ppc32le", "PowerPC 32 LE", "PPC"); ++ + RegisterTarget Y(getThePPC64Target(), "ppc64", + "PowerPC 64", "PPC"); + +diff --git a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h +index 2d0afbfb..f9d20ef0 100644 +--- a/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h ++++ b/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.h +@@ -14,6 +14,7 @@ namespace llvm { + class Target; + + Target &getThePPC32Target(); ++Target &getThePPC32LETarget(); + Target &getThePPC64Target(); + Target &getThePPC64LETarget(); + +diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp +index 074e9fde..6cf986d3 100644 +--- a/lib/Target/TargetMachine.cpp ++++ b/lib/Target/TargetMachine.cpp +@@ -187,7 +187,7 @@ bool TargetMachine::shouldAssumeDSOLocal(const Module &M, + Triple::ArchType Arch = TT.getArch(); + + // PowerPC prefers avoiding copy relocations. +- if (Arch == Triple::ppc || TT.isPPC64()) ++ if (TT.isPPC()) + return false; + + // Check if we can use copy relocations. +diff --git a/test/tools/llvm-objcopy/ELF/binary-output-target.test b/test/tools/llvm-objcopy/ELF/binary-output-target.test +index f7073f07..78fc1435 100644 +--- a/test/tools/llvm-objcopy/ELF/binary-output-target.test ++++ b/test/tools/llvm-objcopy/ELF/binary-output-target.test +@@ -15,8 +15,17 @@ + # RUN: llvm-objcopy -I binary -O elf32-bigmips %t.txt %t.mips.o + # RUN: llvm-readobj --file-headers %t.mips.o | FileCheck %s --check-prefixes=CHECK,BE,MIPS,32 + ++# RUN: llvm-objcopy -I binary -O elf32-powerpc %t.txt %t.ppc32be.o ++# RUN: llvm-readobj --file-headers %t.ppc32be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPC32BE,32 ++ ++# RUN: llvm-objcopy -I binary -O elf32-powerpcle %t.txt %t.ppc32le.o ++# RUN: llvm-readobj --file-headers %t.ppc32le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPC32LE,32 ++ ++# RUN: llvm-objcopy -I binary -O elf64-powerpc %t.txt %t.ppc64be.o ++# RUN: llvm-readobj --file-headers %t.ppc64be.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPC64BE,64 ++ + # RUN: llvm-objcopy -I binary -O elf64-powerpcle %t.txt %t.ppc64le.o +-# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,64 ++# RUN: llvm-readobj --file-headers %t.ppc64le.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPC64LE,64 + + # RUN: llvm-objcopy -I binary -O elf32-littleriscv %t.txt %t.rv32.o + # RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32 +@@ -43,8 +52,8 @@ + # MIPS-SAME: mips{{$}} + # RISCV32-SAME: riscv{{$}} + # RISCV64-SAME: riscv{{$}} +-# PPC-SAME: powerpc{{$}} +-# PPC64le-SAME: powerpc{{$}} ++# PPCBE-SAME: powerpc{{$}} ++# PPCLE-SAME: powerpcle{{$}} + # SPARC-SAME: sparc + # SPARCEL-SAME: sparc + # X86-64-SAME: x86-64 +@@ -54,8 +63,10 @@ + # HEXAGON-NEXT: Arch: hexagon + # I386-NEXT: Arch: i386 + # MIPS-NEXT: Arch: mips{{$}} +-# PPC-NEXT: Arch: powerpc{{$}} +-# PPC64-NEXT: Arch: powerpc64le ++# PPC32BE-NEXT: Arch: powerpc{{$}} ++# PPC32LE-NEXT: Arch: powerpcle{{$}} ++# PPC64BE-NEXT: Arch: powerpc64{{$}} ++# PPC64LE-NEXT: Arch: powerpc64le{{$}} + # RISCV32-NEXT: Arch: riscv32 + # RISCV64-NEXT: Arch: riscv64 + # SPARC-NEXT: Arch: sparc{{$}} +@@ -87,7 +98,7 @@ + # HEXAGON-NEXT: Machine: EM_HEXAGON (0xA4) + # I386-NEXT: Machine: EM_386 (0x3) + # MIPS-NEXT: Machine: EM_MIPS (0x8) +-# PPC-NEXT: Machine: EM_PPC (0x14) ++# PPC32-NEXT: Machine: EM_PPC (0x14) + # PPC64-NEXT: Machine: EM_PPC64 (0x15) + # RISCV32-NEXT: Machine: EM_RISCV (0xF3) + # RISCV64-NEXT: Machine: EM_RISCV (0xF3) +diff --git a/test/tools/llvm-objcopy/ELF/cross-arch-headers.test b/test/tools/llvm-objcopy/ELF/cross-arch-headers.test +index db82c36c..98f1b3c6 100644 +--- a/test/tools/llvm-objcopy/ELF/cross-arch-headers.test ++++ b/test/tools/llvm-objcopy/ELF/cross-arch-headers.test +@@ -34,25 +34,25 @@ + # RUN: llvm-readobj --file-headers %t.elf64_littleaarch64.dwo | FileCheck %s --check-prefixes=CHECK,LE,AARCH,64,SYSV + + # RUN: llvm-objcopy %t.o -O elf32-powerpc %t.elf32_powerpc.o --split-dwo=%t.elf32_powerpc.dwo +-# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV +-# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC,32,SYSV ++# RUN: llvm-readobj --file-headers %t.elf32_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV ++# RUN: llvm-readobj --file-headers %t.elf32_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC32,PPCBE,PPC32BE,32,SYSV + + # RUN: llvm-objcopy %t.o -O elf64-powerpc %t.elf64_powerpc.o --split-dwo=%t.elf64_powerpc.dwo +-# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV +-# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64BE,64,SYSV ++# RUN: llvm-readobj --file-headers %t.elf64_powerpc.o | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV ++# RUN: llvm-readobj --file-headers %t.elf64_powerpc.dwo | FileCheck %s --check-prefixes=CHECK,BE,PPC64,PPCBE,PPC64BE,64,SYSV + + # RUN: llvm-objcopy %t.o -O elf32-powerpcle %t.elf32_ppcle.o --split-dwo=%t.elf32_ppcle.dwo +-# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV +-# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC,32,SYSV ++# RUN: llvm-readobj --file-headers %t.elf32_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV ++# RUN: llvm-readobj --file-headers %t.elf32_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC32,PPCLE,PPC32LE,32,SYSV ++ ++# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo ++# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV ++# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64,PPCLE,PPC64LE,64,SYSV + + # RUN: llvm-objcopy %t.o -O elf32-x86-64 %t.elf32_x86_64.o --split-dwo=%t.elf32_x86_64.dwo + # RUN: llvm-readobj --file-headers %t.elf32_x86_64.o | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV + # RUN: llvm-readobj --file-headers %t.elf32_x86_64.dwo | FileCheck %s --check-prefixes=CHECK,LE,X86-64,32,SYSV + +-# RUN: llvm-objcopy %t.o -O elf64-powerpcle %t.elf64_ppcle.o --split-dwo=%t.elf64_ppcle.dwo +-# RUN: llvm-readobj --file-headers %t.elf64_ppcle.o | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV +-# RUN: llvm-readobj --file-headers %t.elf64_ppcle.dwo | FileCheck %s --check-prefixes=CHECK,LE,PPC64LE,64,SYSV +- + # RUN: llvm-objcopy %t.o -O elf32-littleriscv %t.elf32_littleriscv.o --split-dwo=%t.elf32_littleriscv.dwo + # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV + # RUN: llvm-readobj --file-headers %t.elf32_littleriscv.dwo | FileCheck %s --check-prefixes=CHECK,LE,RISCV32,32,SYSV +@@ -145,9 +145,8 @@ Symbols: + # ARM-SAME: littlearm + # HEXAGON-SAME: hexagon + # MIPS-SAME: mips +-# PPC-SAME: powerpc{{$}} +-# PPC64BE-SAME: powerpc{{$}} +-# PPC64LE-SAME: powerpcle{{$}} ++# PPCBE-SAME: powerpc{{$}} ++# PPCLE-SAME: powerpcle{{$}} + # RISCV32-SAME: riscv{{$}} + # RISCV64-SAME: riscv{{$}} + # SPARC-SAME: sparc +@@ -163,9 +162,10 @@ Symbols: + # MIPSLE-NEXT: Arch: mipsel{{$}} + # MIPS64BE-NEXT: Arch: mips64{{$}} + # MIPS64LE-NEXT: Arch: mips64el{{$}} +-# PPC-NEXT: Arch: powerpc{{$}} ++# PPC32BE-NEXT: Arch: powerpc{{$}} ++# PPC32LE-NEXT: Arch: powerpcle{{$}} + # PPC64BE-NEXT: Arch: powerpc64{{$}} +-# PPC64LE-NEXT: Arch: powerpc64le ++# PPC64LE-NEXT: Arch: powerpc64le{{$}} + # RISCV32-NEXT: Arch: riscv32 + # RISCV64-NEXT: Arch: riscv64 + # SPARC-NEXT: Arch: sparc{{$}} +@@ -191,7 +191,7 @@ Symbols: + # I386: Machine: EM_386 (0x3) + # IAMCU: Machine: EM_IAMCU (0x6) + # MIPS: Machine: EM_MIPS (0x8) +-# PPC: Machine: EM_PPC (0x14) ++# PPC32: Machine: EM_PPC (0x14) + # PPC64: Machine: EM_PPC64 (0x15) + # RISCV32: Machine: EM_RISCV (0xF3) + # RISCV64: Machine: EM_RISCV (0xF3) +diff --git a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s +index bc0b6825..717e6f38 100644 +--- a/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s ++++ b/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s +@@ -1,11 +1,14 @@ +-# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32.o +-# RUN: llvm-objdump -d --no-show-raw-insn %t.32.o | FileCheck --check-prefixes=ELF32,CHECK %s ++# RUN: llvm-mc -triple=powerpc -filetype=obj %s -o %t.32be.o ++# RUN: llvm-objdump -d --no-show-raw-insn %t.32be.o | FileCheck --check-prefixes=ELF32,CHECK %s + +-# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64.o +-# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s ++# RUN: llvm-mc -triple=powerpcle -filetype=obj %s -o %t.32le.o ++# RUN: llvm-objdump -d --no-show-raw-insn %t.32le.o | FileCheck --check-prefixes=ELF32,CHECK %s + +-# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64.o +-# RUN: llvm-objdump -d --no-show-raw-insn %t.64.o | FileCheck --check-prefixes=ELF64,CHECK %s ++# RUN: llvm-mc -triple=powerpc64 -filetype=obj %s -o %t.64be.o ++# RUN: llvm-objdump -d --no-show-raw-insn %t.64be.o | FileCheck --check-prefixes=ELF64,CHECK %s ++ ++# RUN: llvm-mc -triple=powerpc64le -filetype=obj %s -o %t.64le.o ++# RUN: llvm-objdump -d --no-show-raw-insn %t.64le.o | FileCheck --check-prefixes=ELF64,CHECK %s + + # CHECK-LABEL: : + # ELF32-NEXT: bl 0xfffffffc +-- +2.29.2 + diff --git a/srcpkgs/llvm11/files/patches/llvm/llvm-003-ppc-secureplt.patch~b2110e270 (codelite: rebuild for llvm11) b/srcpkgs/llvm11/files/patches/llvm/llvm-003-ppc-secureplt.patch~b2110e270 (codelite: rebuild for llvm11) deleted file mode 100644 index 5be8de4f068..00000000000 --- a/srcpkgs/llvm11/files/patches/llvm/llvm-003-ppc-secureplt.patch~b2110e270 (codelite: rebuild for llvm11) +++ /dev/null @@ -1,11 +0,0 @@ ---- llvm/lib/Target/PowerPC/PPCSubtarget.cpp -+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp -@@ -153,7 +153,7 @@ - - if ((TargetTriple.isOSFreeBSD() && TargetTriple.getOSMajorVersion() >= 13) || - TargetTriple.isOSNetBSD() || TargetTriple.isOSOpenBSD() || -- TargetTriple.isMusl()) -+ isTargetLinux()) - SecurePlt = true; - - if (HasSPE && IsPPC64) diff --git a/srcpkgs/llvm11/template b/srcpkgs/llvm11/template index f0f9c1eeda4..12ecb4bdc4c 100644 --- a/srcpkgs/llvm11/template +++ b/srcpkgs/llvm11/template @@ -69,6 +69,12 @@ post_patch() { patch -sNp1 -i ${i} done + cd ${XBPS_BUILDDIR}/lld-${version}.src + for i in ${FILESDIR}/patches/lld/lld-*.patch; do + msg_normal "Applying $i to lld\n" + patch -sNp1 -i ${i} + done + case "$XBPS_TARGET_MACHINE" in armv5*) cd ${XBPS_BUILDDIR}/compiler-rt-${version}.src